AD5722AREZ Analog Devices Inc, AD5722AREZ Datasheet
AD5722AREZ
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AD5722AREZ Summary of contents
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FEATURES Complete, dual, 12-/14-/16-bit digital-to-analog converter (DAC) Operates from single/dual supplies Software programmable output range +5 V, +10 V, +10.8 V, ±5 V, ±10 V, ±10.8 V INL error: ±16 LSB maximum, DNL error: ±1 LSB maximum Total unadjusted error ...
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AD5722/AD5732/AD5752 TABLE OF CONTENTS Features .............................................................................................. 1 Applications ....................................................................................... 1 General Description ......................................................................... 1 Functional Block Diagram .............................................................. 1 Revision History ............................................................................... 2 Specifications ..................................................................................... 3 AC Performance Characteristics ................................................ 5 Timing Characteristics ................................................................ 5 Timing Diagrams .......................................................................... 6 Absolute ...
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SPECIFICATIONS 4 16 −4 −16 200 pF; all specifications LOAD MIN Table 1. Parameter Min ACCURACY Resolution AD5752 16 ...
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AD5722/AD5732/AD5752 Parameter Min 3 DIGITAL INPUTS Input High Voltage Input Low Voltage Input Current Pin Capacitance DIGITAL OUTPUTS (SDO) 3 Output Low Voltage Output High Voltage Output Low Voltage, ...
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AC PERFORMANCE CHARACTERISTICS 4 16 −4 −16 200 pF; all specifications LOAD MIN Table 2. 2 Parameter DYNAMIC PERFORMANCE Output ...
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AD5722/AD5732/AD5752 TIMING DIAGRAMS SCLK SYNC t 7 SDIN DB23 t 9 LDAC V x OUT V x OUT CLR V x OUT SCLK SYNC t 7 D32B SDIN SDO LDAC t ...
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SCLK 1 SYNC DB23 SDIN INPUT WORD SPECIFIES REGISTER TO BE READ DB23 SDO UNDEFINED DB0 DB23 NOP CONDITION DB0 DB23 SELECTED REGISTER DATA CLOCKED OUT Figure 4. Readback Timing Diagram Rev Page 7 ...
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AD5722/AD5732/AD5752 ABSOLUTE MAXIMUM RATINGS T = 25°C unless otherwise noted. A Transient currents 100 mA do not cause SCR latch-up. Table 4. Parameter Rating AV to GND −0 + GND +0.3 ...
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PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Table 5. Pin Function Descriptions Pin No. Mnemonic Description 1 AV Negative Analog Supply. Voltage ranges from −4 −16.5 V. This pin can be connected output SS ranges are ...
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AD5722/AD5732/AD5752 TYPICAL PERFORMANCE CHARACTERISTICS 6 AV /AV = +12V/0V, RANGE = +10V /AV = ±12V, RANGE = ±10V /AV = ±6.5V, RANGE = ± /AV = +6.5V/0V, RANGE = +5V ...
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TEMPERATURE (°C) Figure 12. AD5752 Integral Nonlinearity Error vs. Temperature 0.1 0 –0.1 –0.2 –0.3 –0.4 –0.5 –0.6 –40 – TEMPERATURE (°C) Figure ...
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AD5722/AD5732/AD5752 0.02 0.01 0 –0.01 –0.02 –0.03 –0.04 11.5 12.0 12.5 13.0 13.5 14.0 14.5 SUPPLY VOLTAGE (V) Figure 18. AD5752 Total Unadjusted Error vs. Supply Voltage 0.04 0.03 0.02 0.01 0 –0.01 –0.02 –0.03 –0.04 –0.05 5.5 6.5 7.5 ...
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TEMPERATURE (°C) Figure 24. Gain Error vs. Temperature 1000 900 800 700 600 500 400 300 200 100 ...
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AD5722/AD5732/AD5752 –3 – TIME (µs) Figure 30. Full-Scale Settling Time Range 0.020 ±10V RANGE, 0x7FFF TO 0x8000 ±10V RANGE, 0x8000 TO 0x7FFF ±5V RANGE, 0x7FFF TO 0x8000 0.015 ...
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AV /AV = +12V/0V, RANGE = +10V /AV = ±12V, RANGE = ±10V /AV = ±6.5V, RANGE = ± /AV = +6.5V/0V, RANGE = + –2 ...
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AD5722/AD5732/AD5752 TERMINOLOGY Relative Accuracy or Integral Nonlinearity (INL) For the DAC, relative accuracy, or integral nonlinearity measure of the maximum deviation in LSBs from a straight line passing through the endpoints of the DAC transfer function. A typical ...
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DC Crosstalk This is the dc change in the output level of one DAC in response to a change in the output of another DAC measured with a full-scale output change on one DAC while monitoring another DAC. ...
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AD5722/AD5732/AD5752 THEORY OF OPERATION The AD5722/AD5732/AD5752 are dual, 12-/14-/16-bit, serial input, unipolar/bipolar, voltage output DACs. They operate from unipolar supply voltages of +4 +16 bipolar supply voltages of ±4 ±16 addition, the ...
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Standalone Operation The serial interface works with both a continuous and noncon- tinuous serial clock. A continuous SCLK source can be used only if SYNC is held low for the correct number of clock cycles. In gated clock mode, a ...
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AD5722/AD5732/AD5752 LOAD DAC (LDAC) After data has been transferred into the input register of the DACs, there are two ways to update the DAC registers and DAC outputs. Depending on the status of both SYNC and LDAC , one of ...
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Ideal Output Voltage to Input Code Relationship—AD5752 Table 7. Bipolar Output, Offset Binary Coding Digital Input MSB LSB ±5 V Output Range 1111 1111 1111 1111 +2 × REFIN × (32,767/32,768) 1111 1111 1111 1110 +2 × REFIN × (32,766/32,768) ...
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AD5722/AD5732/AD5752 Ideal Output Voltage to Input Code Relationship—AD5732 Table 10. Bipolar Output, Offset Binary Coding Digital Input MSB LSB 11 1111 1111 1111 11 1111 1111 1110 … … … … 10 0000 0000 0001 10 0000 0000 0000 01 ...
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Ideal Output Voltage to Input Code Relationship—AD5722 Table 13. Bipolar Output, Offset Binary Coding Digital Input MSB LSB ±5 V Output Range 1111 1111 1111 +2 × REFIN × (2047/2048) 1111 1111 1110 +2 × REFIN × (2046/2048) … … ...
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AD5722/AD5732/AD5752 INPUT SHIFT REGISTER The input shift register is 24 bits wide and consists of a read/write bit ( reserved bit (zero) that must always be set to 0, three register select bits (REG0, REG1, REG2), three ...
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DAC REGISTER The DAC register is addressed by setting the three REG bits to 000. The DAC address bits select the DAC channel in which the data transfer is to take place (see Table 17). The data bits are in ...
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AD5722/AD5732/AD5752 CONTROL REGISTER The control register is addressed by setting the three REG bits to 011. The value written to the address and data bits determines the control function selected. The control register options are shown in Table 23 and ...
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DESIGN FEATURES ANALOG OUTPUT CONTROL In many industrial process control applications vital that the output voltage be controlled during power-up. When the supply voltages change during power-up, the V clamped via a low impedance path ...
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AD5722/AD5732/AD5752 APPLICATIONS INFORMATION +5 V/±5 V OPERATION When operating from a single +5 V supply or a dual ±5 V supply, an output range ± not achievable because suffi- cient headroom for the output ...
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Reference output voltage noise needs to be considered in high accuracy applications that have relatively low noise budgets important to choose a ...
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... TOP VIEW 1.20 MAX 0.15 0.65 SEATING 0.05 BSC PLANE 0.10 COPLANARITY Figure 45. 24-Lead Thin Shrink Small Outline Package, Exposed Pad [TSSOP_EP] ORDERING GUIDE 1 Model Resolution (Bits) AD5722AREZ 12 AD5722AREZ-REEL7 12 AD5732AREZ 14 AD5732AREZ-REEL7 14 AD5752AREZ 16 AD5752AREZ-REEL7 RoHS Compliant Part. 5.02 5.00 4.95 13 4.50 EXPOSED 4 ...
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NOTES AD5722/AD5732/AD5752 Rev Page ...
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AD5722/AD5732/AD5752 NOTES ©2008–2011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D06467-0-3/11(C) Rev Page ...