AD8226ARMZ-RL Analog Devices Inc, AD8226ARMZ-RL Datasheet - Page 19

• Manufacturer Part Number: AD8226ARMZ-RL
• Description: Precision InAmp
• Manufacturer: Analog Devices Inc

Specifications of AD8226ARMZ-RL

• Amplifier Type: Instrumentation
• Number Of Circuits: 1
• Output Type: Rail-to-Rail
• Slew Rate: 0.6 V/µs
• -3db Bandwidth: 1.5MHz
• Current - Input Bias: 20nA
• Voltage - Input Offset: 200µV
• Current - Supply: 350µA
• Current - Output / Channel: 13mA
• Voltage - Supply, Single/dual (±): 2.2 V ~ 36 V, ±1.35 V ~ 18 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 8-MSOP, Micro8™, 8-uMAX, 8-uSOP,
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Gain Bandwidth Product: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

THEORY OF OPERATION
ARCHITECTURE
The AD8226 is based on the classic 3-op-amp topology. This
topology has two stages: a preamplifier to provide differential
amplification, followed by a difference amplifier to remove the
common-mode voltage. Figure 58 shows a simplified schematic
of the AD8226.
The first stage works as follows: in order to maintain a constant
voltage across the bias resistor R
stant diode drop above the positive input voltage. Similarly, A2
keeps Node 4 at a constant diode drop above the negative input
voltage. Therefore, a replica of the differential input voltage is
placed across the gain-setting resistor, R
flows across this resistance must also flow through the R1
and R2 resistors, creating a gained differential signal between
the A2 and A1 outputs. Note that, in addition to a gained
differential signal, the original common-mode signal, shifted
a diode drop up, is also still present.
The second stage is a difference amplifier, composed of A3 and
four 50 kΩ resistors. The purpose of this stage is to remove the
common-mode signal from the amplified differential signal.
The transfer function of the AD8226 is
where:
G
=
1 +
V
OUT
49.4
= G(V
R
G
+IN
kΩ
IN+
− V
OVERVOLTAGE
PROTECTION
ESD AND
IN−
) + V
REF
B
, A1 must keep Node 3 a con-
Q1
NODE 3
R
B
24.7kΩ
G
. The current that
R1
A1
NODE 1
+V
–V
S
S
GAIN STAGE
R
Figure 58. Simplified Schematic
G
V
BIAS
Rev. B | Page 19 of 28
+V
–V
S
S
–V
A2
S
NODE 2
R2
24.7kΩ
NODE 4
Q2
GAIN SELECTION
Placing a resistor across the R
AD8226, which can be calculated by referring to Table 7 or by
using the following gain equation:
Table 7. Gains Achieved Using 1% Resistors
1% Standard Table Value of R
49.9 k
12.4 k
5.49 k
2.61 k
1.00 k
499
249
100
49.9
The AD8226 defaults to G = 1 when no gain resistor is used.
The tolerance and gain drift of the R
to the AD8226 specifications to determine the total gain accu-
racy of the system. When the gain resistor is not used, gain
error and gain drift are minimal.
If a gain of 5 is required and minimal gain drift is important,
consider using the AD8227. The AD8227 has a default gain of 5
that is set with internal resistors. Because all resistors are internal,
the gain drift is extremely low (<5 ppm/°C maximum).
R
B
R
G
OVERVOLTAGE
PROTECTION
=
ESD AND
49.4
G
−
kΩ
1
50kΩ
50kΩ
–IN
R4
R5
G
AMPLIFIER STAGE
G
50kΩ
terminals sets the gain of the
R6
(Ω)
DIFFERENCE
50kΩ
A3
R3
+V
–V
G
S
S
resistor should be added
+V
–V
Calculated Gain
1.990
4.984
9.998
19.93
50.40
100.0
199.4
495.0
991.0
S
S
V
REF
OUT
AD8226