AD9481BSUZ-250 Analog Devices Inc, AD9481BSUZ-250 Datasheet

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AD9481BSUZ-250

Manufacturer Part Number
AD9481BSUZ-250
Description
IC,A/D CONVERTER,SINGLE,8-BIT,TQFP,44PIN
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD9481BSUZ-250

Number Of Bits
8
Sampling Rate (per Second)
250M
Data Interface
Parallel
Number Of Converters
1
Power Dissipation (max)
439mW
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AD9481-PCBZ - BOARD EVAL 8BIT 250MSPS 44-TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD9481BSUZ-250
Manufacturer:
Analog Devices Inc
Quantity:
10 000
Part Number:
AD9481BSUZ-250
Manufacturer:
ADI/亚德诺
Quantity:
20 000
FEATURES
DNL = ±0.35 LSB
INL = ±0.26 LSB
Single 3.3 V supply operation (3.0 V to 3.6 V)
Power dissipation of 439 mW at 250 MSPS
1 V p-p analog input range
Internal 1.0 V reference
Single-ended or differential analog inputs
De-multiplexed CMOS outputs
Power-down mode
Clock duty cycle stabilizer
APPLICATIONS
Digital oscilloscopes
Instrumentation and measurement
Communications
GENERAL DESCRIPTION
The AD9481 is an 8-bit, monolithic analog-to-digital converter
(ADC) optimized for high speed and low power consumption.
Small in size and easy to use, the product operates at a
250 MSPS conversion rate, with excellent linearity and dynamic
performance over its full operating range.
To minimize system cost and power dissipation, the AD9481
includes an internal reference and track-and-hold circuit. The
user only provides a 3.3 V power supply and a differential
encode clock. No external reference or driver components are
required for many applications.
The digital outputs are TTL/CMOS-compatible with an option
of twos complement or binary output format. The output data
bits are provided in an interleaved fashion along with output
clocks that simplifies data capture.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
Point-to-point radios
Digital predistortion loops
The AD9481 is available in a Pb-free, 44-lead, surface-mount
package (TQFP-44) specified over the industrial temperature
range (−40°C to +85°C).
PRODUCT HIGHLIGHTS
1. Superior linearity. A DNL of ±0.35 makes the AD9481
2. Power-down mode. A power-down function may be exercised
3. De-multiplexed CMOS outputs allow for easy interfacing
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.326.8703
suitable for many instrumentation and measurement
applications
to bring total consumption down to 15 mW.
with low cost FPGAs and standard logic.
CLK+
CLK–
VIN+
VIN–
DS+
DS–
VREF SENSE
REFERENCE
T AND H
FUNCTIONAL BLOCK DIAGRAM
PDWN
CLOCK
MGMT
© 2004 Analog Devices, Inc. All rights reserved.
PIPELINE
3.3 V A/D Converter
AGND DRGND
CORE
8-BIT
ADC
Figure 1.
AD9481
8-Bit, 250 MSPS
LOGIC
8
S1
DRVDD
PORT
PORT
A
B
www.analog.com
AVDD
AD9481
8
8
D7A TO D0A
D7B TO D0B
DCO+
DCO–

Related parts for AD9481BSUZ-250

AD9481BSUZ-250 Summary of contents

Page 1

FEATURES DNL = ±0.35 LSB INL = ±0.26 LSB Single 3.3 V supply operation (3 3.6 V) Power dissipation of 439 mW at 250 MSPS 1 V p-p analog input range Internal 1.0 V reference Single-ended or differential ...

Page 2

AD9481 TABLE OF CONTENTS DC Specifications ............................................................................. 3 Digital Specifications........................................................................ 4 AC Specifications.............................................................................. 5 Switching Specifications .................................................................. 6 Timing Diagram ........................................................................... 7 Absolute Maximum Ratings............................................................ 8 Explanation of Test Levels........................................................... 8 ESD Caution.................................................................................. 8 Pin Configuration and Function Descriptions............................. 9 ...

Page 3

DC SPECIFICATIONS AVDD = 3.3 V, DRVDD = 3 −40°C, T MIN clock inputs, unless otherwise noted. Table 1. Parameter RESOLUTION ACCURACY No Missing Codes Offset Error 1 Gain Error Differential Nonlinearity (DNL) Integral Nonlinearity (INL) TEMPERATURE ...

Page 4

AD9481 DIGITAL SPECIFICATIONS AVDD = 3.3 V, DRVDD = 3 −40°C, T MIN clock inputs, unless otherwise noted. Table 2. Parameter CLOCK AND DS INPUTS (CLK+, CLK−, DS+, DS−) Differential Input Common-Mode Voltage 1 Input Resistance Input ...

Page 5

AC SPECIFICATIONS AVDD = 3.3 V, DRVDD = 3 −40°C, T MIN clock inputs, unless otherwise noted. Table 3. Parameter SIGNAL-TO-NOISE RATIO (SNR 19.7 MHz 70.1 MHz IN SIGNAL-TO-NOISE AND DISTORTION (SINAD) ...

Page 6

AD9481 SWITCHING SPECIFICATIONS AVDD = 3.3 V, DRVDD = 3.3 V; differential encode input, duty cycle stabilizer enabled, unless otherwise noted. Table 4. Parameter CLOCK Maximum Conversion Rate Minimum Conversion Rate Clock Pulse-Width High ( Clock Pulse-Width Low ...

Page 7

TIMING DIAGRAM N–1 VIN CLK+ CLK– DS+ DS– INTERLEAVED DATA OUT PORT A STATIC D7A TO D0A PORT B STATIC D7B TO D0B DCO+ DCO– N+1 N+7 8 CYCLES 1 HDS ...

Page 8

AD9481 ABSOLUTE MAXIMUM RATINGS Thermal impedance (θ 46.4°C/W (4-layer PCB). JA Table 5. Min. Parameter Rating ELECTRICAL AVDD (With respect to AGND) −0.5 V DRVDD −0.5 V (With respect to DRGND) AGND (With respect to DRGND) −0.5 V ...

Page 9

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Table 7. Pin Function Descriptions Pin No. Name Description 1 CLK+ Input Clock—True 2 CLK− Input Clock—Complement 3 AVDD 3.3 V Analog Supply 4 AGND Analog Ground 5 DRVDD 3.3 V Digital Output Supply 6 ...

Page 10

AD9481 TERMINOLOGY Analog Bandwidth The analog input frequency at which the spectral power of the fundamental frequency (as determined by the FFT analysis) is reduced by 3 dB. Aperture Delay The delay between the 50% point of the rising edge ...

Page 11

Power Supply Rejection Ratio The ratio of a change in input offset voltage to a change in power supply voltage. Signal-to-Noise and Distortion (SINAD) The ratio of the rms signal amplitude (set 1 dB below full scale) to the rms ...

Page 12

AD9481 TYPICAL PERFORMANCE CHARACTERISTICS AVDD, DRVDD = 3 25°C, A differential drive internal reference mode, unless otherwise noted –10 –20 –30 –40 –50 –60 –70 –80 – (MHz) ...

Page 13

SFDR SNR 45 SINAD 100 150 200 SAMPLE CLOCK (MHz) Figure 10. SNR, SINAD, SFDR vs. Sample Clock Frequency MHz @ − SFDR (dBFS) ...

Page 14

AD9481 2.0 1 EXTERNAL REFERENCE 1.0 0.5 0 –0.5 –1.0 INTERNAL REFERENCE –1.5 –2.0 –40 – TEMPERATURE (°C) Figure 16. Full-Scale Gain Error vs. Temperature 70.3 MHz @ −0.5 dBFS, 250 MSPS IN ...

Page 15

T _R CPD –0 –0.4 –40 – TEMPERATURE (°C) Figure 22. Propagation Delay Sensitivity vs. Temperature CPD 60 80 Rev Page 15 ...

Page 16

AD9481 EQUIVALENT CIRCUITS 16.7kΩ 16.7kΩ 150Ω VIN+ 1.2pF 25kΩ Figure 23. Analog Inputs AVDD 12kΩ CLK+ 150Ω 10kΩ Figure 24. Clock Inputs 30kΩ S1 Figure 25. S1 Input AVDD 150Ω VIN– 1.2pF 25kΩ 12kΩ CLK– 150Ω 10kΩ VDD Rev. 0 ...

Page 17

APPLICATIONS The AD9481 uses a 1.5 bit per stage architecture. The analog inputs drive an integrated high bandwidth track-and-hold circuit that samples the signal prior to quantization by the 8-bit core. For ease of use, the part includes an on-board ...

Page 18

AD9481 Fixed Reference The internal reference can be configured for a differential span p-p (see Figure 34 recommended to place a 0.1 µF capacitor as close as possible to the VREF pin µF ...

Page 19

External Reference An external reference can be used for greater accuracy and temperature stability when required. The gain of the AD9481 can also be varied using this configuration. A voltage output DAC can be used to set VREF, providing for ...

Page 20

AD9481 Table 9. S1 Voltage Levels S1 Voltage Data Format → (0.9 × AVDD) AVDD Offset binary (2/3 × AVDD) ± (0.1 × AVDD) Offset binary (1/3 × AVDD) ± (0.1 × AVDD) Twos complement → AGND (0.1 × AVDD) ...

Page 21

AD9481 EVALUATION BOARD The AD9481 evaluation board offers an easy way to test the device. It requires a clock source, an analog input signal, and a 3.3 V power supply. The clock source is buffered on the board to provide ...

Page 22

AD9481 OPTIONAL XTAL The PCB has been designed to accommodate an optional crystal oscillator that can serve as a convenient clock source. The footprint can accept both through-hole and surface-mount devices, including Vectron XO-400 and Vectron VCC6 family oscillators. VCC ...

Page 23

EVALUATION BOARD BILL OF MATERIALS (BOM) Table 12. No. Quantity Reference Designator C6, C10 to C12, C14 to C15, C17 to C19, C22 to C29, C31, C48 to C49 2 1 C13 3 5 C32 to ...

Page 24

AD9481 PCB SCHEMATICS D4B D5B D6B D7B GND DRGND S1 S1 PWDN PWDN 1 P1 AVDD AVDD 2 P2 AVDD AVDD 3 GND P3 AGND GND 4 VAMP P4 SENSE 1 P1 GND 2 P2 VDL 3 P3 GND 4 ...

Page 25

Figure 40. PCB Schematic ( Rev Page AD9481 05045-041 ...

Page 26

AD9481 PCB LAYERS August 3, 2004 Figure 41. PCB Top-Side Silkscreen Figure 42. PCB Top-Side Copper Routing Figure 43. PCB Ground Layer Figure 44. PCB Split Power Plane Rev Page ...

Page 27

Figure 45. PCB Bottom-Side Copper Routing Figure 46. PCB Bottom-Side Silkscreen Rev Page AD9481 ...

Page 28

... Temperature Range 1 AD9481BSUZ-250 –40°C to +85°C AD9481-PCB Pb-free part. 2 Evaluation board shipped with AD9481BSUZ-250 installed. © 2004 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D05045–0–10/04(0) 1.20 MAX 0. ...

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