AD9518-0BCPZ-REEL7 Analog Devices Inc, AD9518-0BCPZ-REEL7 Datasheet - Page 42

• Manufacturer Part Number: AD9518-0BCPZ-REEL7
• Description: IC,Six Distributed-Output Clock Driver,LLCC,48PIN,PLASTIC
• Manufacturer: Analog Devices Inc
• Type: Clock Generator, Fanout Distributionr

Specifications of AD9518-0BCPZ-REEL7

• Pll: Yes
• Input: CMOS, LVDS, LVPECL
• Output: LVPECL
• Number Of Circuits: 1
• Ratio - Input:output: 1:6
• Differential - Input:output: Yes/Yes
• Frequency - Max: 2.95GHz
• Divider/multiplier: Yes/No
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-LFCSP
• Frequency-max: 2.95GHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AD9518-0/PCBZ - BOARD EVAL FOR AD9518-0
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD9518-0
Table 39. Serial Control Port, 16-Bit Instruction Word, MSB First
MSB
I15
R/W
SCLK
SCLK
SCLK
SDIO
SDIO
SDIO
SDO
CS
CS
CS
DON'T CARE
DON'T CARE
DON'T CARE
DON'T CARE
DON’T CARE
SCLK
SDIO
CS
DON’T CARE
R/W
I14
W1
DON’T CARE
DON’T CARE
W1
R/W
A0 A1 A2 A3
W0
W1
16-BIT INSTRUCTION HEADER
A12
I13
W0
A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
W0
A12
t
S
R/W
I12
A12 = 0
A11 A10 A9 A8 A7
A4
16-BIT INSTRUCTION HEADER
16-BIT INSTRUCTION HEADER
t
A5 A6 A7 A8
Figure 47. Serial Control Port Write—MSB First, 16-Bit Instruction, Timing Measurements
DS
W1
Figure 45. Serial Control Port Write—MSB First, 16-Bit Instruction, Two Bytes Data
Figure 46. Serial Control Port Read—MSB First, 16-Bit Instruction, Four Bytes Data
Figure 49. Serial Control Port Write—LSB First, 16-Bit Instruction, Two Bytes Data
SCLK
SDIO
SDO
I11
A11 = 0
W0
t
CS
DH
A12
A6 A5
A9 A10 A11 A12
t
LOW
Figure 48 Serial Control Port Timing Diagram—Read
I10
A10 = 0
A11
D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0
A4 A3 A2
REGISTER (N) DATA
DATA BIT N
A10
t
HIGH
W0
t
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DV
A9
I9
A9
A1 A0
W1
t
CLK
R/W
A8
I8
A8
D0
D7 D6 D5 D4 D3
DATA BIT N – 1
REGISTER (N – 1) DATA
A7
D1
I7
A7
REGISTER (N) DATA
REGISTER (N) DATA
D2 D3 D4
A6
I6
A6
A5
D2 D1 D0 D7
D5 D6 D7
I5
A5
D4
REGISTER (N – 2) DATA
I4
A4
D3
D0
D2
D6 D5
REGISTER (N – 1) DATA
D1 D2
REGISTER (N + 1) DATA
I3
A3
D1
I2
A2
D4 D3 D2
D3 D4 D5
D0
REGISTER (N – 3) DATA
t
I1
A1
C
D1 D0
D6
DON’T CARE
DON’T CARE
LSB
I0
A0
D7
DON'T CARE
DON'T CARE
DON'T CARE
DON'T CARE
DON’T CARE
DON’T
CARE