ADM706TARZ-REEL Analog Devices Inc, ADM706TARZ-REEL Datasheet - Page 7

• Manufacturer Part Number: ADM706TARZ-REEL
• Description: IC,Power Supply Supervisor,SOP,8PIN,PLASTIC
• Manufacturer: Analog Devices Inc
• Type: Simple Reset/Power-On Resetr

Specifications of ADM706TARZ-REEL

• Number Of Voltages Monitored: 1
• Output: Push-Pull, Totem Pole
• Reset: Active Low
• Reset Timeout: 160 ms Minimum
• Voltage - Threshold: 3.08V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Number Of Elements: 1
• Monitored Voltage 1 (typ): 2.5/3/3.3/5V
• Threshold Voltage 1 (max): 3.15V
• Battery Backup Switching: No
• Watchdog Timer: Yes
• Chip Enable Signals: No
• Reset Active Time: 280ms
• Manual Reset: Yes
• Package Type: SOIC N
• Operating Supply Voltage (min): 1V
• Operating Supply Voltage (max): 5.5V
• Reset Threshold Voltage (max): 3.15V
• Reset Threshold Voltage (min): 3V
• Family Name: ADM706T
• Power Dissipation: 470mW
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Power Fail Detection: Yes
• Mounting: Surface Mount
• Pin Count: 8
• Supply Current: 0.35mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 4. Pin Function Descriptions ADM708R/ADM708S/ADM708T
Pin No.
1
2
3
4
5
6
7
8
ADM706P/ADM706R/ADM706S/ADM706T, ADM708R/ADM708S/ADM708T
Mnemonic
MR
V
GND
PFI
PFO
NC
RESET
RESET
CC
Description
Manual Reset Input. When taken below 0.6 V, a RESET/RESET is generated. MR can be driven from TTL, CMOS
logic, or from a manual reset switch because it is internally debounced. An internal 70 μA pull-up current holds
the input high when floating.
Power Supply Input.
Ground. Ground reference for all signals (0 V).
Power-Fail Input. PFI is the noninverting input to the power-fail comparator. When PFI is less than 1.25 V, PFO
goes low. If unused, PFI should be connected to GND.
Power-Fail Output. PFO is the output from the power-fail comparator. It goes low when PFI is less than 1.25 V.
No Connect.
Logic Output. RESET goes low for 200 ms when triggered. It is triggered either by V
threshold or by a low signal on the MR input. RESET remains low whenever V
remains low for 200 ms after V
timeout does not trigger RESET unless WDO is connected to MR.
Logic Output. RESET is an active high output suitable for systems that use active high reset logic. It is the
inverse of RESET.
Figure 5. ADM708R/ADM708S/ADM708T
GND
V
MR
PFI
CC
1
2
3
4
NC = NO CONNECT
CC
(Not to Scale)
goes above the reset threshold or MR goes from low to high. A watchdog
ADM708R/
Rev. C | Page 7 of 16
ADM708S/
ADM708T
TOP VIEW
8
5
7
6
RESET
RESET
NC
PFO
CC
is below the reset threshold. It
CC
being below the reset