ADN4668ARUZ Analog Devices Inc, ADN4668ARUZ Datasheet - Page 7

• Manufacturer Part Number: ADN4668ARUZ
• Description: IC,LINE RECEIVER,QUAD,CMOS,DIFFERENTIAL,TSSOP,16PIN,PLASTIC
• Manufacturer: Analog Devices Inc
• Type: Line Receiverr

Specifications of ADN4668ARUZ

• Number Of Drivers/receivers: 0/4
• Protocol: LVDS
• Voltage - Supply: 3 V ~ 3.6 V
• Mounting Type: Surface Mount
• Package / Case: 16-TSSOP
• Number Of Elements: 4
• Number Of Receivers: 4
• Number Of Drivers: 4
• Operating Supply Voltage (typ): 3.3V
• Diff. Input Low Threshold Volt: -100mV
• Transmission Data Rate: 400Mbps
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 16
• Package Type: TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 4. Pin Function Descriptions
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Mnemonic
R
R
R
R
R
R
R
R
EN
R
R
GND
V
R
R
EN
IN1−
IN1+
IN2+
IN2−
IN3−
IN3+
IN4+
IN4−
OUT4
OUT3
CC
OUT2
OUT1
Description
Receiver Channel 1 Inverting Input. When this input is more negative than R
more positive than R
Receiver Channel 1 Noninverting Input. When this input is more positive than R
is more negative than R
Receiver Channel 2 Noninverting Input. When this input is more positive than R
is more negative than R
Receiver Channel 2 Inverting Input. When this input is more negative than R
more positive than R
Receiver Channel 3 Inverting Input. When this input is more negative than R
more positive than R
Receiver Channel 3 Noninverting Input. When this input is more positive than R
is more negative than R
Receiver Channel 4 Noninverting Input. When this input is more positive than R
is more negative than R
Receiver Channel 4 Inverting Input. When this input is more negative than R
more positive than R
Active-Low Enable and Power-Down Input with Pull-Down (3 V TTL/CMOS). When EN is held high, EN enables the
receiver outputs when EN is low or open circuit and puts the receiver outputs into a high impedance state and
powers down the device when EN is high.
Receiver Channel 4 Output (3 V TTL/CMOS). If the differential input voltage between R
output is high. If the differential input voltage is negative, this output is low.
Receiver Channel 3 Output (3 V TTL/CMOS). If the differential input voltage between R
output is high. If the differential input voltage is negative, this output is low.
Ground Reference Point for All Circuitry on the Part.
Power Supply Input. These parts can be operated from 3.0 V to 3.6 V.
Receiver Channel 2 Output (3 V TTL/CMOS). If the differential input voltage between R
output is high. If the differential input voltage is negative, this output is low.
Receiver Channel 1 Output (3 V TTL/CMOS). If the differential input voltage between R
output is high. If the differential input voltage is negative, this output is low.
Active-High Enable and Power-Down Input (3 V TTL/CMOS). When EN is held low or open circuit, EN enables the
receiver outputs when EN is high and puts the receiver outputs into a high impedance state and powers down
the device when EN is low.
IN1+
IN2+
IN3+
IN4+
IN1−
IN2−
IN3−
IN4−
, R
, R
, R
, R
OUT1
OUT2
OUT3
OUT4
, R
, R
, R
, R
R
R
R
R
R
R
R
R
OUT1
OUT2
OUT3
OUT4
IN1–
IN1+
IN2–
IN3–
IN3+
IN4+
IN4–
IN2+
is low.
is low.
is low.
is low.
Figure 6. Pin Configuration
is low.
is low.
is low.
is low.
1
4
2
3
5
6
7
8
Rev. A | Page 7 of 12
(Not to Scale)
ADN4668
TOP VIEW
16
15
14
13
12
11
10
9
EN
R
R
V
GND
R
R
EN
CC
OUT1
OUT2
OUT3
OUT4
IN1+
IN2+
IN3+
IN4+
, R
, R
, R
, R
IN1−
IN2−
IN3−
IN4−
OUT1
OUT2
OUT3
OUT4
, R
, R
, R
, R
OUT1
OUT2
OUT3
OUT4
is high. When this input is
is high. When this input is
is high. When this input is
is high. When this input is
IN4+
IN3+
IN2+
IN1+
is high. When this input
is high. When this input
is high. When this input
is high. When this input
and R
and R
and R
and R
IN4−
IN3−
IN2−
IN1−
is positive, this
is positive, this
is positive, this
is positive, this
ADN4668