ADSP-2189NBCAZ-320 Analog Devices Inc, ADSP-2189NBCAZ-320 Datasheet - Page 30

IC,DSP,16-BIT,CMOS,BGA,144PIN,PLASTIC

ADSP-2189NBCAZ-320

Manufacturer Part Number
ADSP-2189NBCAZ-320
Description
IC,DSP,16-BIT,CMOS,BGA,144PIN,PLASTIC
Manufacturer
Analog Devices Inc
Series
ADSP-21xxr
Type
Fixed Pointr
Datasheet

Specifications of ADSP-2189NBCAZ-320

Interface
Host Interface, Serial Port
Clock Rate
80MHz
Non-volatile Memory
External
On-chip Ram
192kB
Voltage - I/o
1.8V, 2.5V, 3.3V
Voltage - Core
1.90V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
144-CSPBGA
Device Core Size
16b
Architecture
Enhanced Harvard
Format
Fixed Point
Clock Freq (max)
80MHz
Mips
80
Device Input Clock Speed
80MHz
Ram Size
192KB
Operating Supply Voltage (typ)
2.5/3.3V
Operating Supply Voltage (min)
1.8V
Operating Supply Voltage (max)
2/3.6V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
144
Package Type
CSPBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADSP-2189NBCAZ-320
Manufacturer:
Analog Devices Inc
Quantity:
10 000
ADSP-218xN
Bus Request–Bus Grant
Table 17. Bus Request–Bus Grant
1
2
3
Parameter
Timing Requirements:
t
t
Switching Characteristics:
t
t
t
t
t
t
BR is an asynchronous signal. If BR meets the setup/hold requirements, it will be recognized during the current clock cycle; otherwise the signal will be recognized on
xMS = PMS, DMS, CMS, IOMS, BMS.
BGH is asserted when the bus is granted and the processor or BDMA requires control of the bus to continue.
BH
BS
SD
SDB
SE
SEC
SDBH
SEH
the following cycle. Refer to the ADSP-2100 Family User’s Manual for BR/BG cycle relationships.
BR Hold after CLKOUT High
BR Setup before CLKOUT Low
CLKOUT High to xMS, RD, WR Disable
xMS, RD, WR Disable to BG Low
BG High to xMS, RD, WR Enable
xMS, RD, WR Enable to CLKOUT High
xMS, RD, WR Disable to BGH Low
BGH High to xMS, RD, WR Enable
PMS, DMS
CMS, WR,
BMS, RD
CLKOUT
CLKOUT
IOMS
BGH
BG
BR
1
1
3
3
t
Rev. A | Page 30 of 48 | August 2006
SD
t
Figure 28. Bus Request–Bus Grant
BH
2
t
t
BS
t
SDBH
SDB
Min
0.25t
0.25t
0
0
0.25t
0
0
t
t
SEH
SE
CK
CK
CK
t
+ 2
+ 8
– 3
SEC
Max
0.25t
CK
+ 8
Unit
ns
ns
ns
ns
ns
ns
ns
ns

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