ADV202BBCZ-150 Analog Devices Inc, ADV202BBCZ-150 Datasheet - Page 2

• Manufacturer Part Number: ADV202BBCZ-150
• Description: IC,Compression/Decompression Processor,BGA,144PIN,PLASTIC
• Manufacturer: Analog Devices Inc
• Type: JPEG2000 Video Codecr

Specifications of ADV202BBCZ-150

• Resolution (bits): 16 b
• Sigma Delta: No
• Voltage - Supply, Analog: 1.5V, 3.3V
• Voltage - Supply, Digital: 1.5V, 3.3V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 144-CSPBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADV202
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 3
General Description ......................................................................... 4
Specifications..................................................................................... 5
Absolute Maximum Ratings.......................................................... 19
Pin BGA Assignments and Function Descriptions ................... 20
Theory of Operation ...................................................................... 26
JPEG2000 Feature Support.......................................................... 4
Supply Voltages and Current ...................................................... 5
Input/Output Specifications........................................................ 5
Clock and RESET Specifications ................................................ 6
Normal Host Mode—Read Operation ...................................... 7
Normal Host Mode—Write Operation ..................................... 8
DREQ / DACK DMA Mode—Single FIFO Write Operation .. 9
DREQ / DACK DMA Mode—Single FIFO Read Operation . 11
External DMA Mode—FIFO Write, Burst Mode .................. 13
External DMA Mode—FIFO Read, Burst Mode ................... 14
Streaming Mode (JDATA)—FIFO Read/Write ...................... 16
VDATA Mode Timing ............................................................... 17
Raw Pixel Mode Timing ............................................................ 18
Thermal Resistance .................................................................... 19
ESD Caution................................................................................ 19
Pin BGA Assignments ............................................................... 20
Pin Function Descriptions ........................................................ 23
Wavelet Engine ........................................................................... 26
Entropy Codecs........................................................................... 26
Rev. C | Page 2 of 40
ADV202 Interface .......................................................................... 27
Internal Registers............................................................................ 29
Video Input Formats ...................................................................... 32
Applications..................................................................................... 34
Outline Dimensions ....................................................................... 39
Embedded Processor System .................................................... 26
Memory System.......................................................................... 26
Internal DMA Engine ................................................................ 26
Video Interface (VDATA Bus).................................................. 27
Host Interface (HDATA Bus) ................................................... 27
Direct and Indirect Registers .................................................... 27
Control Access Registers ........................................................... 27
Pin Configuration and Bus Sizes/Modes ................................ 28
Stage Register .............................................................................. 28
JDATA Mode............................................................................... 28
External DMA Engine ............................................................... 28
Direct Registers........................................................................... 29
Indirect Registers........................................................................ 30
PLL ............................................................................................... 31
Hardware Boot............................................................................ 31
Encode—Multichip Mode......................................................... 34
Decode—Multichip Master/Slave ............................................ 35
Digital Still Camera/Camcorder .............................................. 35
Encode/Decode SDTV Video Application ............................. 36
ASIC Application (32-Bit Host/32-Bit ASIC)......................... 37
HIPI (Host Interface—Pixel Interface) ................................... 38
JDATA Interface ......................................................................... 38
Ordering Guide .......................................................................... 40