AM29LV320DT90EI AMD (ADVANCED MICRO DEVICES), AM29LV320DT90EI Datasheet - Page 12

• Manufacturer Part Number: AM29LV320DT90EI
• Description: Flash Memory IC
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AM29LV320DT90EI

• Memory Configuration: 4M X 8 / 2M X 16 Bit
• Package/case: 48-TSOP
• Supply Voltage Max: 3.6V
• Leaded Process Compatible: No
• Peak Reflow Compatible (260 C): No
• Access Time, Tacc: 90nS
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

The internal state machine is set for reading
array data upon device power-up, or after a
hardware reset. This ensures that no spurious
alteration of the memory content occurs during
the power transition. No command is necessary
in this mode to obtain array data. Standard mi-
croprocessor read cycles that assert valid ad-
dresses on the device address inputs produce
valid data on the device data outputs. The de-
vice remains enabled for read access until the
command register contents are altered.
See
page 11
Read-Only Operations table for timing specifi-
cations and to
timing diagram. I
table represents the active current specification
for reading array data.
Writing Commands/Command Sequences
To write a command or command sequence
(which includes programming data to the de-
vice and erasing sectors of memory), the sys-
tem must drive WE# and CE# to V
to V
For program operations, the BYTE# pin deter-
mines whether the device accepts program
data in bytes or words. Refer to
Configuration” on page 11
tion.
The device features an Unlock Bypass mode
to facilitate faster programming. Once the de-
vice enters the Unlock Bypass mode, only two
write cycles are required to program a word or
byte, instead of four. The
ration” on page 11
programming data to the device using both
standard and Unlock Bypass command se-
quences.
An erase operation can erase one sector, multi-
ple sectors, or the entire device.
page 13
the address space that each sector occupies. A
“sector address” is the address bits required to
uniquely select a sector.
I
the active current specification for the write
mode. The
tion contains timing specification tables and
timing diagrams for write operations.
Accelerated Program Operation
The device offers accelerated program opera-
tions through the ACC function. This is one of
two functions provided by the WP#/ACC pin.
12
CC2
IH
“Requirements for Reading Array Data” on
in the DC Characteristics table represents
.
for more information. Refer to the AC
through
“AC Characteristics” on page 38
Figure 14, on page 38
Table 5, on page 16
CC1
section contains details on
in the DC Characteristics
“Word/Byte Configu-
for more informa-
“Word/Byte
IL
Table 2, on
, and OE#
indicate
for the
sec-
Am29LV320D
This function is primarily intended to allow
faster manufacturing throughput at the factory.
If the system asserts V
automatically enters the aforementioned Un-
lock Bypass mode, temporarily unprotects any
protected sectors, and uses the higher voltage
on the pin to reduce the time required for pro-
gram operations. The system would use a
two-cycle program command sequence as re-
quired by the Unlock Bypass mode. Removing
V
to normal operation. Note that the WP#/ACC
pin must not be at V
than accelerated programming, or device dam-
age may result. In addition, the WP#/ACC pin
must not be left floating or unconnected; incon-
sistent behavior of the device may result.
Autoselect Functions
If the system writes the autoselect command
sequence, the device enters the autoselect
mode. The system can then read autoselect
codes from the internal register (which is sepa-
rate from the memory array) on DQ7–DQ0.
Standard read cycle timings apply in this mode.
Refer to the
“Autoselect Command Sequence” on page 25
sections for more information.
I
r e p r e s e n t t h e c u r r e n t s p e c i f i c a t i o n s f o r
read-while-program and read-while-erase, re-
spectively.
Standby Mode
When the system is not reading or writing to
the device, it can place the device in the
standby mode. In this mode, current consump-
tion is greatly reduced, and the outputs are
placed in the high impedance state, indepen-
dent of the OE# input.
The device enters the CMOS standby mode
when the CE# and RESET# pins are both held
at V
stricted voltage range than V
SET# are held at V
V, the device is in the standby mode, but the
standby current is greater. The device requires
standard access time (t
the device is in either of these standby modes,
before it is ready to read data.
If the device is deselected during erasure or
programming, the device draws active current
until the operation is completed.
I
the standby current specification.
CC6
CC3
HH
from the WP#/ACC pin returns the device
CC
in the DC Characteristics table represents
and I
± 0.3 V. (Note that this is a more re-
CC7
“Autoselect Mode” on page 16
in the DC Characteristics table
IH
, but not within V
HH
HH
CE
) for read access when
on this pin, the device
for operations other
IH
.) If CE# and RE-
November 15, 2004
CC
± 0.3
and