CS2300P-CZZR Cirrus Logic Inc, CS2300P-CZZR Datasheet - Page 17

• Manufacturer Part Number: CS2300P-CZZR
• Description: IC General Purpose PLL LCO
• Manufacturer: Cirrus Logic Inc
• Type: Fanout Distribution, Fractional N Synthesizerr

Specifications of CS2300P-CZZR

• Pll: Yes
• Input: Clock
• Output: Clock
• Number Of Circuits: 1
• Ratio - Input:output: 1:2
• Differential - Input:output: No/No
• Frequency - Max: 75MHz
• Divider/multiplier: Yes/Yes
• Voltage - Supply: 3.1 V ~ 3.5 V
• Operating Temperature: -10°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 10-MSOP, Micro10™, 10-uMAX, 10-uSOP
• Frequency-max: 75MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1494 - BOARD EVAL GEN PURPOSE PLL
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

DS844PP2
5.6
5.7
5.7.1
Auxiliary Output
The auxiliary output pin (AUX_OUT) can be mapped, as shown in
clock (CLK_IN), additional PLL clock output (CLK_OUT), or a PLL lock indicator (Lock). The mux is con-
trolled via the AuxOutSrc[1:0] modal parameter. If AUX_OUT is set to Lock, the AuxLockCfg global param-
eter is then used to control the output driver type and polarity of the LOCK signal (see
page
differ from the CLK_OUT pin. The driver for the pin can be set to high-impedance using the M2 pin when
the M2Config[1:0] global parameter is set to either 001 or 010.
Mode Pin Functionality
M1 and M0 Mode Pin Functionality
M[1:0] determine the functional mode of the device and select both the default User Defined Ratio and
the set of modal parameters. The modal parameters are RModSel[1:0], AuxOutSrc[1:0], and AutoRMod.
By modifying one or more of the modal parameters between the 4 sets, different functional configurations
can be achieved. However, global parameters are fixed and the same value will be applied to each func-
tional configuration.
Referenced Control
AuxOutSrc[1:0]......................“Auxiliary Output Source Selection (AuxOutSrc[1:0])” on page 21
AuxOutDis
AuxLockCfg...........................“AUX PLL Lock Output Configuration (AuxLockCfg)” section on page 22
M2Config[2:0]........................“M2 Pin Configuration (M2Config[2:0])” on page 22
22). If AUX_OUT is set to CLK_OUT, the phase of the PLL Clock Output signal on AUX_OUT may
.............................“M2 Configured as Output Disable” on page 18
Frequency Reference Clock
PLL Lock/Unlock Indication
Figure 14 on page 20
PLL Clock Output
Parameter Definition
(PLLClkOut)
Figure 12. Auxiliary Output Selection
(CLK_IN)
(Lock)
Confidential Draft
AuxOutSrc[1:0]
3:1 Mux
provides a summary of all parameters used by the device.
3/18/09
M2Config[1:0] = 001, 010
M2 pin with
AuxLockCfg
Figure
12, to one of three signals: input
Auxiliary Output Pin
(AUX_OUT)
CS2300-OTP
section 6.3.2 on
17