CS2300P-DZZR Cirrus Logic Inc, CS2300P-DZZR Datasheet - Page 21

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CS2300P-DZZR

Manufacturer Part Number
CS2300P-DZZR
Description
IC General Purpose PLL LCO
Manufacturer
Cirrus Logic Inc
Type
Fanout Distribution, Fractional N Synthesizerr
Datasheets

Specifications of CS2300P-DZZR

Pll
Yes
Input
Clock
Output
Clock
Number Of Circuits
1
Ratio - Input:output
1:2
Differential - Input:output
No/No
Frequency - Max
75MHz
Divider/multiplier
Yes/Yes
Voltage - Supply
3.1 V ~ 3.5 V
Operating Temperature
-10°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
10-MSOP, Micro10™, 10-uMAX, 10-uSOP
Frequency-max
75MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1494 - BOARD EVAL GEN PURPOSE PLL
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
DS844PP2
6.1.2
6.1.3
6.2
6.3
6.3.1
Ratio 0 - 3
The four 32-bit User Defined Ratios are stored in the CS2300’s one time programmable memory. See
put to Input Frequency Ratio Configuration” on page 13
page 24
Global Configuration Parameters
Auxiliary Output Source Selection (AuxOutSrc[1:0])
Selects the source of the AUX_OUT signal.
Note:
Lock Output Configuration (AuxLockCfg)” on page
Auto R-Modifier Enable (AutoRMod)
Controls the automatic ratio modifier function.
Clock Skip Enable (ClkSkipEn)
This parameter enables clock skipping mode for the PLL and allows the PLL to maintain lock even when
the CLK_IN has missing pulses.
Note:
AuxOutSrc[1:0]
00
01
10
11
Application:
AutoRMod
0
1
Application:
ClkSkipEn
0
1
Application:
for more details.
When set to 11, the AuxLockCfg global parameter sets the polarity and driver type
f
CLK_IN
must be < 80 kHz to use this feature.
Auxiliary Output Source
Reserved.
CLK_IN.
CLK_OUT.
PLL Lock Status Indicator.
“Auxiliary Output” on page 17
Automatic R-Mod State
Disabled.
Enabled.
“Automatic Ratio Modifier (Auto R-Mod)” on page 14
PLL Clock Skipping Mode
Disabled.
Enabled.
“CLK_IN Skipping Mode” on page 10
Confidential Draft
3/18/09
22).
and
“Calculating the User Defined Ratio” on
CS2300-OTP
(“AUX PLL
“Out-
21

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