CS5460A-BSZR Cirrus Logic Inc, CS5460A-BSZR Datasheet - Page 52

IC Sngl-Phs Bi-Directional Power/Energy

CS5460A-BSZR

Manufacturer Part Number
CS5460A-BSZR
Description
IC Sngl-Phs Bi-Directional Power/Energy
Manufacturer
Cirrus Logic Inc
Datasheet

Specifications of CS5460A-BSZR

Input Impedance
30 KOhm
Measurement Error
0.1%
Voltage - I/o High
0.8V
Voltage - I/o Low
0.2V
Current - Supply
2.9mA
Voltage - Supply
4.75 V ~ 5.25 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
24-SSOP
Meter Type
Single Phase
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
CDB5460AU - EVALUATION BOARD FOR CS5460A
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
CS5460A-BSZR
Manufacturer:
CIRRUS
Quantity:
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Part Number:
CS5460A-BSZR
Manufacturer:
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Quantity:
20 000
52
Voltage
Reference Output
Voltage
Reference Input
Differential
Current Inputs
Power Supply Connections
Positive
Digital Supply
Digital Ground
Negative
Analog Supply
Positive
Analog Supply
Power Fail Monitor
RESET
Other
No Connection
15,16
19
11
12
13
14
17
18
3
4
VREFOUT - The on-chip voltage reference is output from this pin. The voltage reference
has a nominal magnitude of 2.5 V and is reference to the VA- pin on the converter.
VREFIN - The voltage input to this pin establishes the voltage reference for the on-chip
modulator.
IIN+, IIN- - Differential analog input pins for current channel.
VD+ - The positive digital supply is nominally +5 V ±10% relative to DGND.
DGND - The common-mode potential of digital ground must be equal to or above the
common-mode potential of VA-.
VA- - The negative analog supply pin must be at the lowest potential.
VA+ - The positive analog supply is nominally +5 V ±10% relative to VA-.
PFMON - The power fail Monitor pin monitors the analog supply. Typical threshold level
(PMLO) is 2.45 V with respect to the VA- pin. If PFMON voltage threshold is tripped, the
LSD (low-supply detect) bit is set in the Status Register. Once the LSD bit has been set,
it will not be able to be reset until the PFMON voltage increases ~100 mV (typical) above
the PMLO voltage. Therefore, there is hysteresis in the PFMON function.
Reset - When reset is taken low, all internal registers are set to their default states.
NC - No connection. Pin should be left floating.
CS5460A
DS487F4

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