CS5461A-ISZR Cirrus Logic Inc, CS5461A-ISZR Datasheet
CS5461A-ISZR
Specifications of CS5461A-ISZR
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CS5461A-ISZR Summary of contents
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... V neous power, apparent power, and active power for single-phase 3-wire power metering applications. The CS5461A is optimized to interface to shunt resistors or current transformers for current mea- surement, and to resistive dividers or potential transformers for voltage measurement. The CS5461A features a bi-directional serial in- ...
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... Power-down States . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 5.11 Oscillator Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 5.12 Event Handler . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21 5.12.1 Typical Interrupt Handler . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 5.13 Serial Port Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 5.13.1 Serial Port Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 5.14 Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 6. Register Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 6.1 Configuration Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 6.2 Current and Voltage DC Offset Register ( I 2 TABLE OF CONTENTS , DCoff DCoff CS5461A DS661F2 ...
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... Auto-Boot Data for E 2 8.3 Suggested E PROM Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 9. Basic Application Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 10. Package Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 11. Ordering Information 12. Environmental, Manufacturing, & Handling Information . . . . . . . . . . . . . . . . . . . . . . . 43 13. Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 DS661F2 , Active , RMS RMS ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 off ACoff Duration ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Level ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Gain ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 off 2 PROM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 2 PROM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . CS5461A , ACoff ) . . . . . . . . . . . . . . . . . . . . . . . . . . 31 3 ...
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... Figure 1. CS5461A Read and Write Timing Diagrams ........................................................................... 11 Figure 2. Data Flow. ................................................................................................................................ 13 Figure 3. Normal Format on pulse outputs E1 and E2............................................................................ 16 Figure 4. Alternate Pulse Format on E1 and E2 ..................................................................................... 17 Figure 5. Mechanical Counter Format on E1 and E2.............................................................................. 17 Figure 6. Stepper Motor Format on E1 and E2 ....................................................................................... 18 Figure 7. Voltage Sag Detect .................................................................................................................. 19 Figure 8 ...
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... OVERVIEW The CS5461A is a CMOS monolithic power measurement device with a computation engine and an en- ergy-to-frequency pulse output. The CS5461A combines a programmable-gain amplifier, two ∆Σ ana- log-to-digital converters (ADCs), system calibration and a computation engine on a single chip. The CS5461A is designed for power measurement applications and is optimized to interface to a cur- rent-sense resistor or transformer for current measurement, and to a resistive divider or potential trans- former for voltage measurement ...
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... DGND - Digital Ground. VA+ - The positive analog supply. AGND - Analog ground. PFMON - The power fail monitor pin monitors the analog supply. If PFMON’s voltage threshold is not met, a Low-Supply Detect (LSD) bit is set in the status register. CS5461A Crystal In Serial Data Input Energy Output 2 Energy Output 1 ...
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... THD (50, 60 Hz) (Gain = 10) IC (Gain = 50) EII (Gain = 10 (Gain = 50) OD (Note 2) GE {(VIN+) - (VIN-)} VIN THD (50, 60 Hz) All Gain Ranges IC EII (Note 2) GE CS5461A Min Typ Max Unit 3.135 5.0 5.25 V 4.75 5 -40 - +85 °C . Min Typ Max Unit - ± ...
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... V DC supply voltage at VA+ and VD+ pins. The “+” and “-” input pins of both input channels are shorted to AGND. Then the CS5461A is commanded to continuous conversion acquisition mode, and digital output data is collected for the channel under test. The (zero-to-peak) value of the digital sinusoidal output signal is determined, and this value is converted into the (zero-to-peak) value of the sinusoidal voltage (measured in mV) that would need to be applied at the channel’ ...
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... DCLK = MCLK/K (Both Channels) OWR - (Note 13) FSCR (Note 14 XIN SCLK and RESET V IL XIN SCLK and RESET V IL XIN SCLK and RESET out out OL (Note 15 out CS5461A . Min Typ Max 2.5 4.096 -2.8 - +2.8 - DCLK DCLK/1024 - - 0 100 1.0 0.6 VD (VD 0.8 VD+ ...
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... SCLK Any Digital Output t fall SCLK Any Digital Output t ost SCLK Pulse Width High t 1 Pulse Width Low Pulse Width Low t 9 Pulse Width High CS5461A . Min Typ Max Unit - - 1.0 µ 100 µ 1.0 µ 100 µ MHz 200 - - ns 200 - - ...
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... Figure 1. CS5461A Read and Write Timing Diagrams DS661F2 SDI Write Timing (Not to Scale SDO Read Timing (Not to Scale Auto-Boot Sequence Timing (Not to Scale) CS5461A ...
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... Total power dissipation, including all input currents and output currents Symbol (Notes 18 and 19) Positive Digital VD+ Positive Analog VA+ (Notes 20, 21, 22 OUT (Note 23 All Analog Pins V INA All Digital Pins V IND stg CS5461A Min Typ Max Unit -0.3 - +6.0 V -0 ± 100 500 mW - 0.3 - (VA ...
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... Order SINC 3 ∆Σ PGA CURRENT Modulator * DENOTES REGISTER NAME. 4. THEORY OF OPERATION The CS5461A is a dual-channel analog-to-digital con- verter (ADC) followed by a computation engine that per- forms power calculations and conversion. The flow diagram for the two data paths is depicted in Figure 2 ...
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... Refer to RMS RMS formance Specifications on page 7. Until the CS5461A is calibrated, the accuracy of the CS5461A (with respect to a reference line-voltage and line-current level on the power mains) is not guaranteed to within ±0.1%. See Section 7. System Calibration page 35. The accuracy of the internal calculations can ...
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... FUNCTIONAL DESCRIPTION 5.1 Analog Inputs The CS5461A is equipped with two fully differential in- put channels. The inputs VIN± and IIN± are designated as the voltage and current channel inputs, respectively. The full-scale differential input voltage for the current and voltage channel is ±250 mV ...
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... Some calculations are inhibited when the cycle count is less than 2. 5.4 Energy Pulse Output The CS5461A provides three output pins for energy reg- istration. The E1 and E2 pins provide a simple interface which energy can be registered. These pins are de- signed to directly connect to a stepper motor or electro- mechanical counter ...
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... Stepper Motor Format Setting bits STEP = 1 and MECH = 0 in the Control Register and bit ALT = 0 in the Configuration Register configures the E1 and E2 pins for stepper motor format. When the accumulated active power equals the defined t PW CS5461A 1 < ----------- - PulseRateE ...
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... V rms and 20 A rms. ⁄ 1024 Solving for PulseRateE Therefore with and VIN = 220V IIN = 15A the PulseRateE PulseRateE CS5461A (see Section 5.1 An page 15). To prevent over-driving the and I by design. Therefore the RMS RMS using the transfer function: 1,2 2 × ...
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... No Load Threshold The CS5461A includes the LoadIntv (No Load Detec- tion Interval) register and the LoadMin register to imple- ment the no load threshold function. When the accumulated energy measured within the time defined by the LoadIntv register does not reach the value in the LoadMin register, the pulse outputs will be disabled ...
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... Fahrenheit scale. 5.8 Voltage Reference The CS5461A is specified for operation with a +2.5 V reference between the VREFIN and AGND pins. To uti- lize the on-chip 2.5 V reference, connect the VREFOUT pin to the VREFIN pin of the device. The VREFIN pin can be used to connect external filtering and/or refer- ences ...
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... DCLK is 3 MHz, which is a valid value for DCLK. 5.12 Event Handler The INT pin is used to indicate that an internal error or event has taken place in the CS5461A. Writing a logic 1 to any bit in the Mask Register allows the corresponding bit in the Status Register to activate the INT pin. The in- terrupt condition is cleared by writing a logic 1 to the bit that has been set in the Status Register ...
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... Serial Port Overview The CS5461A incorporates a serial port transmit and re- ceive buffer with a command decoder that interprets one-byte (8 bits) commands as they are received. There are four types of commands; instructions, synchroniz- ing, register writes and register reads (See Commands on page 23). ...
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... To conserve power the CS5461A has two power-down states. In stand-by state all circuitry, except the analog/digital clock generators, is turned off. In the sleep state all circuitry, except the instruction decoder, is turned off. Bringing the CS5461A out of sleep state requires more time than out of stand-by state, because of the extra time needed to re-start and re-stabilize the analog oscillator. ...
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... Pulse width register for mechanical counter output mode Pulse width register for E3 energy pulse output Voltage Sag Duration Duration Voltage Sag Level Threshold Level No load threshold interval (detection window) Interrupt Mask No Load Threshold Control Temperature Sensor Gain Gain Temperature Sensor Offset off Apparent Power CS5461A th SCLK. DS661F2 ...
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... CAL4 CAL3 CAL2 CAL1 CAL0 The CS5461A can perform system calibrations. Proper input signals must be applied to the current and voltage channel before performing a designated calibration. CAL[4:0]* Designates calibration to be performed 01001 = Current channel DC offset 01010 = Current channel DC gain 01101 = Current channel AC offset ...
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... Normal (default), Mechanical Counter or Stepper Motor Format 1 = Alternate Pulse Format, also MECH = 1 VHPF (IHPF) Enables the high-pass filter on the voltage (current) channel High-pass filter disabled (default High-pass filter enabled PC4 PC3 PC2 IMODE IINV iCPU K3 CS5461A Igain PC1 PC0 EPP EOP EDP DS661F2 ...
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... A one second computational cycle period occurs when MCLK = 4.096 MHz and N = 4000. DS661F2 ,V ) DCoff DCoff - -17 ..... are initialized to 0.0 on reset. When DC Offset calibration is performed, the ) DCoff DCoff , -16 ..... ..... CS5461A -18 -19 -20 -21 - < 1.0, with the binary point to the , V DCoff -17 -18 -19 -20 - LSB -23 2 LSB -22 2 LSB 0 ...
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... The value is represented in two's complement notation and in the range of -1.0 ≤ P with the binary point to the right of the MSB ..... -17 ..... Active - -17 ..... RMS RMS ) - -18 ..... off - -17 ..... CS5461A with 2 -18 -19 -20 - -18 -19 -20 - < 1.0, with the Active -19 -20 -21 - < 1.0, with the binary , V RMS RMS -18 -19 -20 - register and can be active LSB - ...
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... Invalid Command. Normally logic 1. Set to logic invalid command is received or the Sta- tus Register has not been successfully read. DS661F2 CRDY EOR VOD IOD Register overflows. RMS Register overflows. RMS overflows. ACTIVE See Section 5.5 Voltage Sag-detect Feature CS5461A IOR VOR LSD VSAG IC on page 19. 29 ...
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... ACoff < 1.0, with the binary point to the right of the MSB ACoff ACoff ..... -10 ..... C). The value is represented in two's complement notation ) Gain - -16 ..... < 2.0, with the binary point to the right of the second Gain CS5461A ) -18 -19 -20 -21 - with 2 -11 -12 -13 -14 - -17 -18 -19 -20 -21 ...
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... Setting this register to zero will disable Voltage Sag-detect. The LEVEL ) Level - -17 ..... defines the voltage level that the magnitude of input samples, averaged over the < 1.0, with the binary point to the right of the MSB. Level CS5461A ...
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... Default = 0x000000 = No load threshold feature disabled LoadMin sets the no load threshold value. LoadMin is a two’s complement value in the range of -1.0 ≤ LoadMin < 1.0 with the binary point to the right of the MSB. Negative values are not allowed ..... -17 ..... CS5461A -18 -19 -20 -21 - DS661F2 ...
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... C) is the default. Values are represented in unsigned notation and in the range of 0 ≤ T < 128, with the binary point to the right of the seventh MSB. Gain DS661F2 INTOD ) Gain -11 ..... utilized to convert from one temperature scale to an- Gain CS5461A FAC EAC STOP NOCPU NOOSC STEP -12 -13 -14 -15 - LSB -17 ...
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... Apparent power (S) is the product of the V and in the range of 0.0 ≤ S < 1.0, with the binary point to the left of the MSB off - -17 ..... -18 ..... and I . The value is represented in unsigned binary notation RMS RMS CS5461A -18 -19 -20 -21 - < 1.0, with the binary point to the off -19 -20 -21 -22 - DS661F2 LSB -23 2 ...
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... Figure 9. The flow applies to both the volt- age channel and current channel. 7.1.1 Calibration Sequence The CS5461A must be operating in its active state and ready to accept valid commands. Refer to Commands on page 23. The calibration algorithms are dependent on the value N in the Cycle Count Register ...
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... The maximum value that the gain registers can attain is 4. Therefore, if the signal level of the applied input is low enough that it causes the CS5461A to attempt to set either gain register higher than 4, the gain calibration result will be invalid and all CS5461A results obtained while performing measure- ments will be invalid ...
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... AC offset register with the product. 7.2 Phase Compensation The CS5461A is equipped with phase compensation to cancel out phase shifts introduced by the measurement element. Phase Compensation is set by bits PC[6:0] in the Configuration Register. ...
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... AUTO-BOOT MODE USING E When the CS5461A MODE pin is asserted (logic 1), the CS5461A auto-boot mode is enabled. In auto-boot mode, the CS5461A downloads the required com- mands and register data from an external serial 2 E PROM, allowing the CS5461A to begin performing energy measurements. 8.1 Auto-Boot Configuration ...
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... In this type of shunt resistor configuration, the common-mode level of the CS5461A must be referenced to the line side of the power line. This means that the common-mode poten- tial of the CS5461A will track the high-voltage levels, as well as low-voltage levels, with respect to earth ground potential ...
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... CS 23 SDI 6 Serial SDO Data 5 SCLK Interface 20 INT DGND 13 4 Mech. Counter or Stepper Motor 5 kΩ 10 kΩ 10 Ω 0.1 µ VA+ VD+ CS5461A 17 PFMON 9 VIN+ 2 CPUCLK 1 XOUT 4.095 MHz Optional 24 VIN- XIN Clock Source IIN+ 19 RESET Serial SDO Data 5 IIN- SCLK ...
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... Ω Burden Idiff 1k Ω 0.1 µF Note: Indicates common (floating) return. CS5461A 5 kΩ 10 kΩ 10 Ω 0.1 µ VA+ VD+ CS5461A 17 PFMON VIN+ 2 CPUCLK 1 XOUT 4.096 MHz Optional 24 VIN- XIN Clock Source IIN+ 19 RESET 7 CS Serial 23 SDI Data 6 SDO Interface 5 IIN- ...
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... JEDEC #: MO-150 Controlling Dimension is Millimeters. CS5461A ∝ END VIEW L MILLIMETERS NOM MAX -- 2.13 0.13 0.25 1.73 1.88 -- 0.38 8.20 8.50 7.80 8.20 5 ...
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... ORDERING INFORMATION Model CS5461A-IS CS5461A-ISZ (lead free) 12. ENVIRONMENTAL, MANUFACTURING, & HANDLING INFORMATION Model Number CS5461A-IS CS5461A-ISZ (lead free) * MSL (Moisture Sensitivity Level) as specified by IPC/JEDEC J-STD-020. DS661F2 Temperature -40 to +85 °C Peak Reflow Temp MSL Rating* 240 °C 260 °C CS5461A Package 24-pin SSOP ...
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... Cirrus Logic, Cirrus, and the Cirrus Logic logo designs are trademarks of Cirrus Logic, Inc. All other brand and product names in this document may be trademarks or service marks of their respective owners. SPI is a trademark of Motorola, Inc. Microwire is a trademark of National Semiconductor Corporation. 44 www.cirrus.com CS5461A Changes DS661F2 ...