CY8C3866LTI-067 Cypress Semiconductor Corp, CY8C3866LTI-067 Datasheet - Page 59

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CY8C3866LTI-067

Manufacturer Part Number
CY8C3866LTI-067
Description
CY8C3866LTI-067
Manufacturer
Cypress Semiconductor Corp
Series
PSOC™ 3 CY8C38xxr
Datasheets

Specifications of CY8C3866LTI-067

Core Processor
8051
Core Size
8-Bit
Speed
67MHz
Connectivity
EBI/EMI, I²C, LIN, SPI, UART/USART, USB
Peripherals
CapSense, DMA, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.71 V ~ 5.5 V
Data Converters
A/D 2x20b, D/A 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY8C3866LTI-067
Manufacturer:
Cypress
Quantity:
260
Figure 8-11. LCD System
8.6.1 LCD Segment Pin Driver
Each GPIO pin contains an LCD driver circuit. The LCD driver
buffers the appropriate output of the LCD DAC to directly drive
the glass of the LCD. A register setting determines whether the
pin is a common or segment. The pin’s LCD driver then selects
one of the six bias voltages to drive the I/O pin, as appropriate
for the display data.
8.6.2 Display Data Flow
The LCD segment driver system reads display data and
generates the proper output voltages to the LCD glass to
produce the desired image. Display data resides in a memory
buffer in the system SRAM. Each time you need to change the
common and segment driver voltages, the next set of pixel data
moves from the memory buffer into the Port Data Registers
through the DMA.
8.6.3 UDB and LCD Segment Control
A UDB is configured to generate the global LCD control signals
and clocking. This set of signals is routed to each LCD pin driver
through a set of dedicated LCD global routing channels. In
addition to generating the global LCD control signals, the UDB
also produces a DMA request to initiate the transfer of the next
frame of LCD data.
8.6.4 LCD DAC
The LCD DAC generates the contrast control and bias voltage
for the LCD system. The LCD DAC produces up to five LCD drive
voltages plus ground, based on the selected bias ratio. The bias
voltages are driven out to GPIO pins on a dedicated LCD bias
bus, as required.
Document Number: 001-11729 Rev. *R
Global
Clock
UDB
DMA
Display
RAM
PHUB
LCD Driver
Block
DAC
LCD
PIN
8.7 CapSense
The CapSense system provides a versatile and efficient means
for measuring capacitance in applications such as touch sense
buttons, sliders, proximity detection, etc. The CapSense system
uses a configuration of system resources, including a few
hardware functions primarily targeted for CapSense. Specific
resource usage is detailed in the CapSense component in PSoC
Creator.
A capacitive sensing method using a Delta-sigma Modulator
(CSD) is used. It provides capacitance sensing using a switched
capacitor technique with a delta-sigma modulator to convert the
sensing current to a digital code.
8.8 Temp Sensor
Die temperature is used to establish programming parameters
for writing flash. Die temperature is measured using a dedicated
sensor based on a forward biased transistor. The temperature
sensor has its own auxiliary ADC.
8.9 DAC
The CY8C38 parts contain up to four Digital to Analog
Convertors (DACs). Each DAC is 8-bit and can be configured for
either voltage or current output. The DACs support CapSense,
power supply regulation, and waveform generation. Each DAC
has the following features:
Adjustable voltage or current output in 255 steps
Programmable step size (range selection)
Eight bits of calibration to correct ± 25 percent of gain error
Source and sink option for current output
8 Msps conversion rate for current output
1 Msps conversion rate for voltage output
Monotonic in nature
Data and strobe inputs can be provided by the CPU or DMA,
or routed directly from the DSI
Dedicated low-resistance output pin for high-current mode
PSoC
®
3: CY8C38 Family
Data Sheet
Page 59 of 129
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