DSPIC33FJ06GS102-E/SP Microchip Technology, DSPIC33FJ06GS102-E/SP Datasheet - Page 141

16 Bit MCU/DSP 40MIPS 6 KB FLASH 256B RAM SMPS 28 SPDIP .300in TUBE

DSPIC33FJ06GS102-E/SP

Manufacturer Part Number
DSPIC33FJ06GS102-E/SP
Description
16 Bit MCU/DSP 40MIPS 6 KB FLASH 256B RAM SMPS 28 SPDIP .300in TUBE
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr

Specifications of DSPIC33FJ06GS102-E/SP

Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
6KB (6K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-DIP (0.300", 7.62mm)
Product
DSCs
Data Bus Width
16 bit
Processor Series
DSPIC33F
Core
dsPIC
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
21
Data Ram Size
256 B
Maximum Operating Temperature
+ 125 C
Mounting Style
Through Hole
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
REGISTER 8-1:
© 2009 Microchip Technology Inc.
bit 3
bit 2-1
bit 0
Note 1: Writes to this register require an unlock sequence. Refer to Section 42. “Oscillator (Part IV)” (DS70307)
2: Direct clock switches between any primary oscillator mode with PLL and FRCPLL mode are not permitted.
in the “dsPIC33F Family Reference Manual” (available from the Microchip website) for details.
This applies to clock switches in either direction. In these instances, the application must switch to FRC mode
as a transition clock source between the two PLL modes.
dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04
CF: Clock Fail Detect bit (read/clear by application)
1 = FSCM has detected clock failure
0 = FSCM has not detected clock failure
Unimplemented: Read as ‘0’
OSWEN: Oscillator Switch Enable bit
1 = Request oscillator switch to selection specified by NOSC<2:0> bits
0 = Oscillator switch is complete
OSCCON: OSCILLATOR CONTROL REGISTER
Preliminary
(1)
(CONTINUED)
DS70318D-page 139

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