DSPIC33FJ128MC710-I/PF Microchip Technology, DSPIC33FJ128MC710-I/PF Datasheet - Page 38

IC,DSP,16-BIT,CMOS,TQFP,100PIN,PLASTIC

DSPIC33FJ128MC710-I/PF

Manufacturer Part Number
DSPIC33FJ128MC710-I/PF
Description
IC,DSP,16-BIT,CMOS,TQFP,100PIN,PLASTIC
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr

Specifications of DSPIC33FJ128MC710-I/PF

Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
85
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 24x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1001 - DSPIC33 BREAKOUT BOARDMA330013 - MODULE PLUG-IN DSPIC33 100TQFPDV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32AC164323 - MODULE SKT FOR 100TQFPDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC33FJ128MC710-I/PF
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
DSPIC33FJ128MC710-I/PF
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
dsPIC33FJXXXMCX06/X08/X10
4.1.1
The
word-addressable blocks. Although it is treated as
24 bits wide, it is more appropriate to think of each
address of the program memory as a lower and upper
word, with the upper byte of the upper word being
unimplemented. The lower word always has an even
address, while the upper word has an odd address
(Figure 4-2).
Program memory addresses are always word-aligned
on the lower word, and addresses are incremented or
decremented by two during code execution. This
arrangement also provides compatibility with data
memory space addressing and makes it possible to
access data in the program memory space.
FIGURE 4-2:
DS70287C-page 36
program
0x000001
0x000003
0x000005
0x000007
Address
msw
PROGRAM MEMORY
ORGANIZATION
memory
Program Memory
PROGRAM MEMORY ORGANIZATION
‘Phantom’ Byte
(read as ‘0’)
00000000
00000000
00000000
00000000
space
most significant word
is
23
organized
in
16
Instruction Width
4.1.2
All dsPIC33FJXXXMCX06/X08/X10 devices reserve
the addresses between 0x00000 and 0x000200 for
hard-coded program execution vectors. A hardware
Reset vector is provided to redirect code execution
from the default value of the PC on device Reset to the
actual start of code. A GOTO instruction is programmed
by the user at 0x000000, with the actual address for the
start of code at 0x000002.
dsPIC33FJXXXMCX06/X08/X10 devices also have
two interrupt vector tables located from 0x000004 to
0x0000FF and 0x000100 to 0x0001FF. These vector
tables allow each of the many device interrupt sources
to be handled by separate Interrupt Service Routines
(ISRs). A more detailed discussion of the interrupt vec-
tor tables is provided in Section 7.1 “Interrupt Vector
Table”.
least significant word
8
INTERRUPT AND TRAP VECTORS
© 2009 Microchip Technology Inc.
0
(lsw Address)
PC Address
0x000000
0x000002
0x000004
0x000006

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