DSPIC33FJ12MC201-E/SS Microchip Technology, DSPIC33FJ12MC201-E/SS Datasheet - Page 82

12 KB Flash, 1 KB RAM, 40 MIPS, 13 I/O, 16-bit Motor Control DSC, NanoWatt 20 SS

DSPIC33FJ12MC201-E/SS

Manufacturer Part Number
DSPIC33FJ12MC201-E/SS
Description
12 KB Flash, 1 KB RAM, 40 MIPS, 13 I/O, 16-bit Motor Control DSC, NanoWatt 20 SS
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr

Specifications of DSPIC33FJ12MC201-E/SS

Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
15
Program Memory Size
12KB (12K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
20-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Revision H (October 2010)
This revision includes the following updates:
• Text and formatting updates have been
• All references to V
• All occurrences of PGC and PGD have been
• Added topics covered in
• Moved the Checksum Computation table to the
• Updated all occurrences of TBLPG to TBLPAG
• Removed the ERASEB command from the
• Updated the High-Level Enhanced ICSP™
• Replaced the Device Configuration Register Map
• Updated the Note in
• Changed Opcode 0x7 to Reserved in the
• Removed 4.2.10 “ERASEB Command”
• Updated the table cross-references in
• Combined all Default Configuration Register
• Relocated the paragraph on ICSP programming
• Added a Note to
• Updated Step 4 in Programming the Programming
• Updated Device IDs and Revision IDs (see
• Updated parameters D111, P1, P1A and P1B in
• Added Checksum Computation Example When
DS70152H-page 82
incorporated throughout the document
changed to: V
changed to PGCx and PGDx, respectively
Overview”
appendix (see
throughout the document
Command Set Summary (see
Programming Flow (see
(previously Table 4-3) with individual tables for
each dsPIC33F/PIC24H device family (see
Table 3-3
“Programming Methodology”
Programming Executive Command Set (see
Table
Section 5.7 “Writing Configuration Memory”
Values tables into one table (see
details, which now appears just before
Executive (see
Table
the AC/DC Characteristics and Timing
Requirements (see
Using CodeGuard™ Security (see
4-1)
7-1)
through
CAP
Table
Table
Section 6.1 “Overview”
Table
CAP
Table
Section 3.6.2
D-1)
6-1)
/V
DDCORE
3-12)
Figure
Section 1.0 “Device
8-1)
Table
3-1)
have been
Table
Table
3-1)
Table 5-7
5-6)
D-2).
© 2010 Microchip Technology Inc.

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