DSPIC33FJ64GP804T-I/PT Microchip Technology, DSPIC33FJ64GP804T-I/PT Datasheet - Page 230

• Manufacturer Part Number: DSPIC33FJ64GP804T-I/PT
• Description: 16-bit DSC, 64KB Flash,CAN, DMA,40 MIPS,nanoWatt 44 TQFP 10x10x1mm T/R
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ64GP804T-I/PT

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: CAN, I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: AC'97, Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 13x10b/12b, D/A 6x16b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: DSPIC33FJ64GP804T-I/PTTR

dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, AND dsPIC33FJ128GPX02/X04
REGISTER 19-7:
DS70292E-page 230
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-8
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
R/W-0
IVRIE
U-0
—
Unimplemented: Read as ‘0’
IVRIE: Invalid Message Received Interrupt Enable bit
1 = Interrupt Request Enabled
0 = Interrupt Request not enabled
WAKIE: Bus Wake-up Activity Interrupt Flag bit
1 = Interrupt Request Enabled
0 = Interrupt Request not enabled
ERRIE: Error Interrupt Enable bit
1 = Interrupt Request Enabled
0 = Interrupt Request not enabled
Unimplemented: Read as ‘0’
FIFOIE: FIFO Almost Full Interrupt Enable bit
1 = Interrupt Request Enabled
0 = Interrupt Request not enabled
RBOVIE: RX Buffer Overflow Interrupt Enable bit
1 = Interrupt Request Enabled
0 = Interrupt Request not enabled
RBIE: RX Buffer Interrupt Enable bit
1 = Interrupt Request Enabled
0 = Interrupt Request not enabled
TBIE: TX Buffer Interrupt Enable bit
1 = Interrupt Request Enabled
0 = Interrupt Request not enabled
WAKIE
R/W-0
U-0
—
CiINTE: ECAN™ INTERRUPT ENABLE REGISTER
C = Writable bit, but only ‘0’ can be written to clear the bit
W = Writable bit
‘1’ = Bit is set
ERRIE
R/W-0
U-0
—
R/W-0
U-0
—
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
FIFOIE
R/W-0
U-0
—
RBOVIE
R/W-0
U-0
—
© 2011 Microchip Technology Inc.
x = Bit is unknown
R/W-0
RBIE
U-0
—
R/W-0
TBIE
U-0
—
bit 8
bit 0