LTC4267CDHC Linear Technology, LTC4267CDHC Datasheet - Page 19

• Manufacturer Part Number: LTC4267CDHC
• Description: IC,SMPS CONTROLLER,CURRENT-MODE,CMOS,SSOP,16PIN,PLASTIC
• Manufacturer: Linear Technology

Specifications of LTC4267CDHC

• Linear Misc Type: Negative Voltage
• Package Type: DFN EP
• Operating Supply Voltage (max): -57V
• Operating Temperature (min): 0C
• Operating Temperature (max): 70C
• Operating Temperature Classification: Commercial
• Product Depth (mm): 3mm
• Product Length (mm): 5mm
• Mounting: Surface Mount
• Pin Count: 16
• Lead Free Status / Rohs Status: Not Compliant

APPLICATIO S I FOR ATIO
Signature Disable Interface
To disable the 25kΩ signature resistor, connect SIGDISA pin
to the V
high with respect to V
disable interface is shown in Figure 16, option 2. Note that
the SIGDISA input resistance is relatively large and the
threshold voltage is fairly low. Because of high voltages
present on the printed circuit board, leakage currents from
the V
ensure trouble-free operation, use high voltage layout
techniques in the vicinity of SIGDISA. If unused, connect
SIGDISA to V
Load Capacitor
The IEEE 802.3af specifi cation requires that the PD maintain
a minimum load capacitance of 5µF (provided by C1 in
Figure 11). It is permissible to have a much larger load
capacitor and the LTC4267 can charge very large load
capacitors before thermal issues become a problem. The
load capacitor must be large enough to provide suffi cient
energy for proper operation of the switching regulator.
However, the capacitor must not be too large or the PD
design may violate IEEE 802.3af requirements.
If the load capacitor is too large, there can be a problem
with inadvertent power shutdown by the PSE. Consider
the following scenario. If the PSE is running at –57V
(maximum allowed) and the PD has detected and powered
up, the load capacitor will be charged to nearly –57V. If
for some reason the PSE voltage is suddenly reduced to
–44V (minimum allowed), the input bridge will reverse bias
and the PD power will be supplied by the load capacitor.
Depending on the size of the load capacitor and the DC load
of the PD, the PD will not draw any power for a period of
time. If this period of time exceeds the IEEE 802.3af 300ms
disconnect delay, the PSE will remove power from the PD.
For this reason, it is necessary to ensure that inadvertent
shutdown cannot occur.
Very small output capacitors (≤10µF) will charge very
quickly in current limit. The rapidly changing voltage at
the output may reduce the current limit temporarily, caus-
ing the capacitor to charge at a somewhat reduced rate.
Conversely, charging a very large capacitor may cause the
current limit to increase slightly. In either case, once the
PORTP
PORTP
pin could inadvertently pull SIGDISA high. To
PORTN
pin. Alternately, SIGDISA pin can be driven
.
U
PORTN
U
. An example of a signature
W
U
output voltage reaches its fi nal value, the input current
limit will be restored to its nominal value.
The load capacitor can store signifi cant energy when fully
charged. The design of a PD must ensure that this energy
is not inadvertently dissipated in the LTC4267. The polar-
ity-protection diode(s) prevent an accidental short on the
cable from causing damage. However, if the V
is shorted to V
is charged, current will fl ow through the parasitic body
diode of the internal MOSFET and may cause permanent
damage to the LTC4267.
Maintain Power Signature
In an IEEE 802.3af system, the PSE uses the maintain
power signature (MPS) to determine if a PD continues to
require power. The MPS requires the PD to periodically
draw at least 10mA and also have an AC impedance less
than 26.25kΩ in parallel with 0.05µF. If either the DC
current is less than 10mA or the AC impedance is above
26.25kΩ, the PSE may disconnect power. The DC current
must be less than 5mA and the AC impedance must be
above 2MΩ to guarantee power will be removed.
Selecting Feedback Resistor Values
The regulated output voltage of the switching regulator is
determined by the resistor divider across V
R2 in Figure 11) and the error amplifi er reference voltage
V
voltage can be calculated as:
In an isolated power supply application, V
by the designer’s choice of an external error amplifi er.
Commercially available error amplifi ers or programmable
shunt regulators may include an internal reference of
1.25V or 2.5V. Since the LTC4267 internal reference and
error amplifi er are not used in an isolated design, tie the
V
In a nonisolated power supply application, the LTC4267
onboard internal reference and error amplifi er can be
used. The resistor divider output can be tied directly to
the V
nominal.
REF
FB
R2 = R1 • (V
pin to PGND.
. The ratio of R2 to R1 needed to produce the desired
FB
pin. The internal reference of the LTC4267 is 0.8V
OUT
PORTP
– V
inside the PD while the capacitor
REF
)/V
REF
LTC4267
REF
is determined
OUT
PORTN
(R1 and
19
4267fc
pin