LTC6908IDCB-1#PBF Linear Technology, LTC6908IDCB-1#PBF Datasheet - Page 11

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LTC6908IDCB-1#PBF

Manufacturer Part Number
LTC6908IDCB-1#PBF
Description
Manufacturer
Linear Technology
Type
Silicon Oscillatorr
Datasheet

Specifications of LTC6908IDCB-1#PBF

Mounting Style
Surface Mount
Screening Level
Industrial
Product Depth (mm)
3mm
Lead Free Status / RoHS Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LTC6908IDCB-1#PBFLTC6908IDCB-1
Manufacturer:
LT
Quantity:
10 000
APPLICATIO S I FOR ATIO
and load response are maintained while peak electromag-
netic radiation (or conduction) is reduced. Output ripple
may be somewhat increased, but its behavior is very much
like noise and its system impact is benign.
HIGH FREQUENCY REJECTION
Using the LTC6908 in spread spectrum mode naturally
eliminates any concerns for output frequency accuracy
and stability as it is continually hopping to new settings.
In fi xed frequency applications however, some attention to
V
output frequency error. Ripple frequency components on
the supply line near the programmed output frequency of
the LTC6908 in excess of 30mV
tional 0.2% of frequency error. In applications where a fi xed
frequency LTC6908 output clock is used to synchronize
the same switching regulator that provides the V
to the oscillator, noticeable jitter of the clock may occur
if the ripple exceeds 30mV
START-UP TIME
The start-up time and settling time to within 1% of the fi nal
value can be estimated by t
For instance, with R
within 1% of its 1MHz fi nal value in approximately 260µs.
+
supply voltage ripple is required to minimize additional
U
SET
= 100k, the LTC6908 will settle to
U
START
P-P
.
≈ R
P-P
SET
W
could create an addi-
• (2.5µs/k) + 10µs.
U
+
supply
Figure 7 shows start-up times for various R
An internal counter mutes the outputs for the fi rst 64 clock
cycles after power-up, ensuring that the fi rst clock cycle
is close to the desired operating frequency.
JITTER
The Peak-to-Peak Jitter vs Output Frequency graph, in
the Typical Performance Characteristics section, shows
the typical clock jitter as a function of oscillator frequency
and power supply voltage. These specifi cations assume
that the capacitance on SET is limited to less than 10pF,
as suggested in the Pin Functions description. If this
requirement is not met, the jitter will increase.
10000
1000
100
LTC6908-1/LTC6908-2
10
1k
T
V
A
+
= 25°C
= 3V
Figure 7. Start-Up Time
10k
R
SET
100k
(Ω)
1M
690812 F07
SET
10M
resistors.
11
690812fa

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