PI6C557-10LEX Pericom Semiconductor, PI6C557-10LEX Datasheet

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PI6C557-10LEX

Manufacturer Part Number
PI6C557-10LEX
Description
Clock Generators & Support Products Network Clock Generator
Manufacturer
Pericom Semiconductor
Datasheet

Specifications of PI6C557-10LEX

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Product Features
• 100MHz Differential Output, 33MHz LVCMOS
• Supply voltage of 3.3V ±5%
• 25MHz input frequency
• Jitter 60ps cycle-to-cycle (typ) 100MHz
• Industrial temperature range
• Packaging: (Pb-free and Green)
Block Diagram
Pin Confi guration
—16-pin, 173 mils wide TSSOP
09-0015
crystal or clock
25 MHz
Load
Capacitors
X1/CLK
X2
GNDX
GNDA
VDDA
VDDX
XOUT
GND
VDD
XIN
Crystal
Driver
1
2
3
4
5
6
7
8
VDD
GND
Phase Lock Loop
5
1
5
Description
The PI6C557-10 is an integrated 100MHz differential and 33MHz
LVCMOS clock generator. It uses a 25MHz quartz crystal to provide
an input frequency reference. The high performance internal PLL
multiplier is a proven design that ships world-wide for PCI Express
applications.
The PI6C557-10 is available in a 16 lead 4.4 x 5.0mm TSSOP
package and is operated from a single 3.3V supply. Separate supply
pins are provided for analog core, 100MHz differential output,
and 33MHz LVCMOS output to adhere to lowest risk, best known
power supply partitioning practices.
OE
16
15
14
13
12
11
10
9
OE
GND
100M
100M
VDD
VDD33
33M
GND33
Network Clock Generator
100M
100M
33M
PS8982A
PI6C557-10
07/27/09

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PI6C557-10LEX Summary of contents

Page 1

... The high performance internal PLL multiplier is a proven design that ships world-wide for PCI Express applications. The PI6C557-10 is available lead 4.4 x 5.0mm TSSOP package and is operated from a single 3.3V supply. Separate supply pins are provided for analog core, 100MHz differential output, and 33MHz LVCMOS output to adhere to lowest risk, best known power supply partitioning practices ...

Page 2

... Ground. Power. Ground for 33MHz output. 33.3MHz LVCMOS output. Power for 33MHz output Power. Complimentary 100MHz differential output. 100MHz differential output. Ground. Output enable, tristates both 100MHz and 33MHz outputs when HIGH. Internal pull-down is 30Kohm. 2 PI6C557-10 Network Clock Generator PS8982A 07/27/09 ...

Page 3

... DD pull-downs OE = HIGH Input pin capacitance Output pin capacitance 3 PI6C557-10 Network Clock Generator Note: Stresses greater than those listed under MAX I MUM RAT- INGS may cause permanent damage to the de vice. This is a stress rating only and func tion tion of the device at these or any other conditions above those indicated in the operational sections of this specifi ...

Page 4

... OH ° ° = 3.3V ± +85 DD Conditions 20 10pF High Pulse Width Output Cycle Time PI6C557-10 Network Clock Generator ° 3.465V unless otherwise stated below.) Min. Typ. Max. 400 725 850 1.0 1.25 1.6 ° C) t465V) Min. Typ. Max. 100 1 1.2 1.4 ...

Page 5

... A general interface is shown above 100 differential transmission line environment, drivers require a matched load termination of 100 across near the receiver input. 09-0015 Conditions Still air Units MHz PPM pF Ω μW 50Ω R1 100Ω 50Ω 5 PI6C557-10 Network Clock Generator Min. Typ. Max. Unit ° 90 C/W ° 24 C/W 3.3V PS8982A 07/27/09 ...

Page 6

... Pericom Semiconductor Corporation 3545 N. 1st Street, San Jose, CA 95134 1-800-435-2335 DESCRIPTION: 16-Pin, 173-Mil Wide, TSSOP PACKAGE CODE: L Package Code L 6 PI6C557-10 Network Clock Generator DOCUMENT CONTROL NO 1310 REVISION: E DATE: 03/09/05 0.09 .004 .008 0.20 0.45 .018 0.75 ...

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