S-35392A-I8T1G Seiko Instruments, S-35392A-I8T1G Datasheet
S-35392A-I8T1G
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S-35392A-I8T1G Summary of contents
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... The S-35392A is a CMOS 2-wire real-time clock IC which operates with the very low current consumption and in the wide range of operation voltage. The operation voltage that this IC can be used for various power supplies from main supply to backup battery. Due to the 0.45 μA current consumption and wide range of power supply voltage at time keeping, this IC makes the battery life longer. In the system which operates with a backup battery, the included free registers can be used as the function for user’ ...
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... REAL-TIME CLOCK S-35392A Pin Configuration Remark Please select products of environmental code = U for Sn 100%, halogen-free products. List of Pin Pin No. Symbol Pin for constant output of 1 32KO 32.768 kHz 2 XOUT Connection pin for crystal oscillator 3 XIN 4 VSS GND pin Output pin for interrupt signal ...
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... This pin is to data input/output for I from the SCL pin. This pin has CMOS input and Nch open drain output. Generally in use, pull up this pin to the VDD potential via a resistor, and connect it to any other device having open drain or open collector output with wired-OR connection. • ...
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... Power-on detection circuit Constant- voltage circuit VSS 4 Divider, INT1 register Comparator 1 Second Minute Hour Comparator 2 INT2 register Shift register Figure 5 Seiko Instruments Inc. Rev.2.0 INT1 controller Real-time data register Day of Day Month Year the week INT2 controller Serial interface _00 32KO ...
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... Operating ambient temperature Storage temperature *1. Conditions with no condensation or frost. Condensation and frost cause short circuiting between pins, resulting in a malfunction. Caution The absolute maximum ratings are rated values exceeding which the product could suffer physical damage. These values must therefore not be exceeded under any conditions. ...
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... SS − SCL, SDA − SCL, SDA V = 0.4 V 32KO, INT 2 OUT SDA V = 0.4 V OUT − − Seiko Instruments Inc 9.1 pF) manufactured by Seiko Instruments Inc.) g Min. Typ. − 0.45 − 6 −0.5 − −0.5 − −0.5 − −0.5 − 0.8 × V − − 0.3 − ...
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... SCL, SDA rise time SCL, SDA fall time Bus release time Noise suppression time *1. Since the output format of the SDA pin is Nch open-drain output, SDA output delay time is determined by the values of the load resistance (R ) and load capacity (C L *2. Regarding the power supply voltage, refer to “ Recommended Operation Conditions”. ...
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... Read/Write command to the SDA bus. After that, output or input is performed from B7 of data. If data I/O has been completed, finish communication by inputting a stop condition to the S-35392A. The master device generates an acknowledgment signal for every 1-byte. Regarding details, refer to “ ...
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... Read-only flag. Valid only when using the alarm function. When the alarm time matches, this flag is set to “1”, and it is cleared to “0” when Read. *4. Read-only flag. “POC” is set to “1” when power is applied cleared to “0” when Read. Regarding “BLD”, refer to “ Low Power Supply Voltage Detection Circuit”. ...
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... BCD code. To Write/Read real-time data 1 access, transmit/receive the data of year in B7, month, day, day of the week, hour, minute, second in B0, in 7-byte. When you skip the procedure to access the data of year, month, day, day of the week, Read/Write real-time data 2 access. In this case, transmit/receive the data of hour in B7, minute, second in B0, in 3-byte ...
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... Feb. (leap year 28: Feb. (non-leap year) Example: 29 (D1, D2, D4, D8, D10, D20 ( Day of the week data (00 to 06): W1, W2 septenary up counter. Day of the week is counted in the order of 00, 01, 02, …, 06, and 00. Set up day of the week and the count value. Hour data ( 11): H1, H2, H4, H8, H10, H20 12-hour expression, write 0 ...
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... This flag is set to “1” when the power supply voltage decreases to the level of detection voltage (V can detect a drop in the power supply voltage. This flag is set to “1” once, is not set to “0” again even if the power supply increases to the level of detection voltage (V to initialize. Regarding the operation of the power supply voltage detection circuit, refer to “ ...
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... R/W R TEST This is a test flag for SII. Be sure to set this flag to “0” in use. If this flag is set to “1”, be sure to initialize to set “0” INT2AE INT2ME INT2FE These bits are used to select the output mode for the alarm 2 interrupt, access the INT2 register after setting the alarm interrupt mode. ...
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... Figure 12 INT1 Register and INT2 Register (Alarm-Time Data) The INT1 register has A1WE, A1HE, A1mE each byte possible to make data valid; the data of day of the week, hour, minute which are in the corresponded byte; by setting these bits to “1”. This is as well in A2WE, A2HE, A2mE in the INT2 register. Setting example: alarm time “ ...
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... R/W (3) Output of user-set frequency (INT2 register) The INT2 register is a 1-byte data register to set up the output frequency. Setting each bit the register to “1”, the frequency which corresponds to the bit is output in the AND-form. SC11 to SC13 in the INT2 register are 3-bit SRAM type registers that can be freely set by users. ...
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... REAL-TIME CLOCK S-35392A 5. Clock-correction register The clock-correction register is a 1-byte register that is used to correct advance/delay of the clock. When not using this function, set this register to “00h”. Regarding the register values, refer to “ Function to Clock-Correction” R/W R/W 6. Free register The free register is a 1-byte SRAM type register that can be set freely by users ...
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... Clock correction register : Free register : “1” is set in the POC flag (B0 in the status register 1) to indicate that power has been applied. In this case, be sure to initialize. The POC flag is set to “0” due to initialization. (Refer to “ Register Status After Initialization”.) For the regular operation of power-on detection circuit, as seen in Figure 18, the period to power-up the S-35392A is that the voltage reaches 1.3 V within 10 ms after setting the IC’ ...
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... Write “1” to reset flag and SC0. : Output from S-35392A : Input from master device 18 00 (Y), 01 (M), 01 (D), 0 (day of the week), 00 (H), 00 (M), 00 (S) “ b” (In B6, B5, B4, the data of B6, B5 the status register 1 at initialization is set. Refer to Figure 19.) “00h” “00h” “00h” “00h” ...
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... If the BLD flag is “1” even after the power supply voltage is recovered, be sure to initialize the circuit. Without initializing, Read in the next BLD flag is done after sampling, the BLD flag gets reset to “0”. In this case, be sure to initialize although the BLD flag is in “0” because the internal circuit may be in the indefinite status. ...
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... AM In 24-hour expression, the are able to read 11 23. *2. Processing of nonexistent data, regarding second data, is done by a carry pulse which is generated one sec after, after Write. At this point the carry pulse is sent to the minute-counter. 2. Correction of end-of-month A nonexistent day, such as February 30 and April 31, is set to the first day of the next month. ...
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... The INT1 flag is also cleared once by Read. In the alarm 1 function, set the data of day of the week, hour, minute of the alarm time in the INT1 register. In alarm 2 interrupt, set in the INT2 register. Refer to “4. INT1 register and INT2 register” in “ Configuration of Register”. ...
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... If users clear INT2AE once; “L” is not output from the the alarm time matches real-time data. *2. If turning the alarm output on by changing the program, within the period when the alarm time matches real-time data, “L” is output again from the 2 ...
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... INT2 pin "L" is output again if this period is within 7.9 ms *1. Pin output is set to “H” by disabling the output mode within 7.9 ms, because the signal of this procedure is maintained for 7.9 ms. Note that pin output is set to “L” by setting enable the output mode again. ...
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... The function to clock-correction is to correct advance/delay of the clock due to the deviation of oscillation frequency, in order to make a high precise clock. For correction, the S-35392A adjusts the clock pulse by using a certain part of the dividing circuit, not adjusting the frequency of the crystal oscillator. Correction is performed once every 20 seconds (or 60 seconds). The minimum resolution is approx. 3 ppm (or approx. 1 ppm) and the S-35392A corrects in the range of − ...
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... Correction value Caution The figure range which can be corrected is that the calculated value is from 0 to 64. *1. Convert this value to be set in the clock correction register. For how to convert, refer to “(a) Calculation example 1”. *2. Measurement value when 1 Hz clock pulse is output from the *3 ...
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... REAL-TIME CLOCK S-35392A 2. Setting value for register and correction value Table 13 Setting Value for Register and Correction Value (Minimum Resolution: 3.052 ppm ( Table 14 Setting Value for Register and Correction Value (Minimum Resolution: 1.017 ppm ( Correction Value • • ...
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... How to confirm setting value for register and result of correction The S-35392A does not adjust the frequency of the crystal oscillation by using the clock-correction function. Therefore users cannot confirm corrected or not by measuring output 32.768 kHz. When the function to clock-correction is being used, the cycle clock pulse output from the Figure 27 ...
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... A start condition is when the SDA line changes “H” to “L” when the SCL line is in “H”, so that the access starts. 2. Stop condition A stop condition is when the SDA line changes “L” to “H” when the SCL line is in “H”, and the access stops, so that the S-35392A gets standby. ...
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... After detecting a start condition, the S-35392A receives device code and command. The S-35392A enters the Read-data mode by the Read/Write bit “1”. The data is output from B7 in 1-byte. Input an acknowledgment signal from the master device every moment that the S-35392A outputs 1-byte data. However, do not input an acknowledgment signal (input NO_ACK) for the last data-byte output from the master device ...
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... After detecting a start condition, S-35392A receives device code and command. The S-35392A enters the Write-data mode by the Read/Write bit “0”. Input data from 1-byte. The S-35392A outputs an acknowledgment signal (“L”) every moment that 1-byte data is input. After receiving the acknowledgment signal which is for the last byte-data, input a stop condition to the S-35392A to finish access ...
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... SDA Device code + command I/O mode switching *1. Set NO_ACK = 1 in Read. *2. Transmit ACK = 0 from the master device to the S-35392A in Read. (3) Status register 1 access and status register 2 access SCL SDA I/O mode switching * Status register 1 selected Status register 2 selected *2. Set NO_ACK = 1 in Read. ...
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... S-35392A (4) INT1 register access and INT2 register access In Read/Write the INT1 and INT2 registers, data varies depending on the setting of the status register 2. Be sure to Read/Write after setting the status register 2. When setting the alarm by using the status register 2, these registers work as 3-byte alarm time data registers, in other statuses, they work as 1-byte registers. When outputting the user-set frequency, they are the data registers to set up the frequency. Regarding details of each data, refer to “ ...
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... Rev.2.0 _00 (5) Clock correction register access SCL SDA I/O mode switching *1. Set NO_ACK = 1 in Read. (6) Free register access SCL SDA I/O mode switching *1. Set NO_ACK = 1 in Read R Device code + command Clock correction data I/O mode switching Figure 39 Clock Correction Register Access ...
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... S-35392A does not operate the next procedure because the internal circuit keeps the state prior to interruption. The S-35392A does not have a reset pin so that users usually reset its internal circuit by inputting a stop condition. However, if the SDA line is outputting “L” (during output of acknowledgment signal or Read), the S-35392A does not accept a stop condition from the master device ...
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... Figure 42 shows the flowchart of initialization at power-on and an example of real-time data set-up. Regarding how to apply power, refer to “ Power-on Detection Circuit and Register Status” unnecessary for users to comply with this flowchart of real-time data strictly. And if using the default data at initializing also unnecessary to set up again. Read status register 1 (status register ...
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... S-35392A VSS XIN XOUT C g Caution 1. Because the I/O pin has no protective diode on the VDD side, the relation of V but pay careful attention to the specifications. 2. Start communication under stable condition after power-on the power supply in the system. VDD S-35392A VSS XIN ...
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... Rev.2.0 _00 Adjustment of Oscillation Frequency 1. Configuration of oscillator Since crystal oscillation is sensitive to external noise (the clock accuracy is affected), the following measures are essential for optimizing the oscillation configuration. (1) Place the S-35392A, crystal oscillator, and external capacitor (C (2) Increase the insulation resistance between pins and the substrate wiring patterns of XIN and XOUT. ...
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... When the S-35392A is turned on, a signal of 32.768 kHz is output from the 32KO pin. Turn the power on and measure the signal with a frequency counter following the circuit configuration shown in Figure 47. Remark If the error range is ± 1 ppm in relation to 32.768 kHz, the time is shifted by approximately 2.6 seconds per month (calculated using the following expression). ...
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... Adjust the rotation angle of the variable capacitance so that the capacitance value is slightly smaller than the center, and confirm the oscillation frequency and the center value of the variable capacitance. This is done in order to make the capacitance of the center value smaller than one half of the actual capacitance value because a smaller capacitance value increases the frequency variation. ...
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... Seiko Instruments Inc. assumes no responsibility for the way in which this IC is used in products created using this IC or for the specifications of that product, nor does Seiko Instruments Inc. assume any responsibility for any infringement of patents or copyrights by products that include this IC either in Japan or in other countries. ...
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... I DD1 0.5 [μA] 0.4 0.3 0.2 0.1 0 −40 − [°C] (5) Oscillation frequency vs 25°C, C 100 Δf/f 0 [ppm 3 −20 −40 −60 −80 −100 (2) Current consumption vs. Input clock characteristics = DD2 [μ [V] (4) Standby current vs 5 DD1 [μ 3 characteristics (6) Oscillation frequency vs 5 [ppm ...
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... DDT Release voltage Detection voltage V (Min) DDT Seiko Instruments Inc. characteristics 25°C 500 450 400 350 300 t STA 250 V = 5.0 V [ms] DD 200 V 150 100 [pF] g SDA pin ° 5 OL2 [mA 3 0.5 1 1.5 V [V] OUT Rev.2.0 _00 = 3 vs OUT OL2 2 2.5 ...
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... Seiko Instruments Inc. is strictly prohibited. • The products described herein cannot be used as part of any device or equipment affecting the human body, such as exercise equipment, medical equipment, security systems, gas equipment, or any apparatus installed in airplanes and other vehicles, without prior written permission of Seiko Instruments Inc. ...