DS26504LNB2 Maxim Integrated Products, DS26504LNB2 Datasheet - Page 128
DS26504LNB2
Manufacturer Part Number
DS26504LNB2
Description
Network Controller & Processor ICs T1-E1-J1-64kHz Compo 4kHz Composite Clock
Manufacturer
Maxim Integrated Products
Datasheet
1.DS26504L.pdf
(129 pages)
Specifications of DS26504LNB2
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Lead free / RoHS Compliant
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Part Number:
DS26504LNB2+
Manufacturer:
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21. REVISION HISTORY
REVISION
070105
081105
101805
020906
053107
100507
121707
042208
072308
DATE
New product release.
Corrected the polarity of the TAIS pin when operating in Hardware mode.
Changed Section 13.4 to read “2.048 x 2
“2.048 x N (where N = 1 to 4).”
Section 13.3.1, Section 13.3.2, SR1 Bits 1 and 2: Clarified the open circuit and
short circuit wording.
Figure 13-1: Corrected the capacitor value from 1μF to 10μF.
Replaced Figure 13-4 and 13-5 (added Table 13-1 and Table 13-2) to show
two different types of recommended protection circuit interfaces.
Added package drawing link to Package Information section, along with
updated package drawing.
Removed reference to E1RCR and E1TCR bit 3 (this bit functionality has been
moved to the MCREG).
Replaced Figure 13-4 and Figure 13-5 to show 10μF cap on TTIP.
In the Absolute Maximum Ratings (Section 19), added Note 1: Specifications
at -40
Operating Temp Range for DS26504LN. Renumbered notes for Table 19-1 to
Table 19-5.
Clarified RITD and TITD descriptions.
For E1TS description, changed 0 = 120Ω and 1 = 75Ω to 0 = 75Ω and 1 =
120Ω.
Corrected Note 2 in the LIC1[7:5] register description to include TT2 along
with TT0 and TT1.
In Section 13, corrected the wording to clearly indicate that different
transformers are required for T1, J1, E1, and 6312kHz modes and for 64KCC
mode.
In Table 7-2, changed address 21 and 22 from “—” to “SR5” and “IMR5”;
added bit 4 (SR5) to IIR.
°
C are guaranteed by design GBD and not production tested. to
DESCRIPTION
128 of 129
N
(where N = 1 to 3)” instead of
CHANGED
113, 114
PAGES
19, 29
92, 93
16, 17
32, 39
—
48
19
84
79
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