NTB52N10G ON Semiconductor, NTB52N10G Datasheet

NTB52N10G

Manufacturer Part Number

NTB52N10G

Description

MOSFET N-CH 100V 52A D2PAK

Manufacturer

ON Semiconductor

Datasheet

1.NTB52N10G.pdf (8 pages)

Specifications of NTB52N10G

Fet Type

MOSFET N-Channel, Metal Oxide

Fet Feature

Standard

Rds On (max) @ Id, Vgs

30 mOhm @ 26A, 10V

Drain To Source Voltage (vdss)

100V

Current - Continuous Drain (id) @ 25° C

52A

Vgs(th) (max) @ Id

4V @ 250µA

Gate Charge (qg) @ Vgs

135nC @ 10V

Input Capacitance (ciss) @ Vds

3150pF @ 25V

Power - Max

Mounting Type

Surface Mount

Package / Case

D²Pak, TO-263 (2 leads + tab)

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Other names

NTB52N10G
NTB52N10GOS

Available stocks

Company

Part Number

Manufacturer

Quantity

Price

Company:

Bonase Electronics (HK) Co., Limited

Part Number:

NTB52N10G

Manufacturer:

Quantity:

12 500

Current page: 1 of 8
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NTB52N10

Power MOSFET

52 Amps, 100 Volts

N−Channel Enhancement−Mode D

Features

•

Typical Applications

•

Stresses exceeding Maximum Ratings may damage the device. Maximum

Ratings are stress ratings only. Functional operation above the Recommended

Operating Conditions is not implied. Extended exposure to stresses above the

Recommended Operating Conditions may affect device reliability.

1. Pulse Test: Pulse Width = 10 ms, Duty Cycle = 2%.

2. When surface mounted to an FR4 board using the minimum recommended

MAXIMUM RATINGS

March, 2011 − Rev. 4

Drain−to−Source Voltage

Drain−to−Source Voltage (R

Gate−to−Source Voltage

Drain Current

Total Power Dissipation @ T

Derate above 25°C

Total Power Dissipation @ T

Operating and Storage Temperature Range

Single Pulse Drain−to−Source Avalanche

Energy − Starting T

Thermal Resistance

Maximum Lead Temperature for Soldering

Purposes, 1/8in from case for 10 seconds

L(pk)

Fast Recovery Diode

Source−to−Drain Diode Recovery Time Comparable to a Discrete

Avalanche Energy Specified

Mounting Information Provided for the D

Pb−Free Packages are Available

PWM Motor Controls

Power Supplies

Converters

pad size, (Cu. Area 0.412 in

DSS

= 40 A, L = 1.0 mH, R

= 50 Vdc, V

and R

− Junction−to−Case

− Junction−to−Ambient

− Junction−to−Ambient (Note 2)

DS(on)

− Continuous

− Non−Repetitive (t

− Continuous @ T

− Pulsed (Note 1)

Rating

= 10 Vdc,

Specified at Elevated Temperature

= 25°C

= 25°C unless otherwise noted)

= 25 W)

= 25°C (Note 2)

= 25°C

= 1.0 MW)

v10 ms)

= 25°C

= 100°C

PAK Package

Symbol

DGR

GSM

, T

DSS

qJC

qJA

stg

−55 to

Value

+150

"20

"40

1.43

62.5

100

156

178

800

260

2.0

0.7

PAK

W/°C

°C/W

Unit

Vdc

Adc

°C

NTB52N10

NTB52N10G

NTB52N10T4

NTB52N10T4G

†For information on tape and reel specifications,

including part orientation and tape sizes, please

refer to our Tape and Reel Packaging Specification

Brochure, BRD8011/D.

Device

CASE 418B

100 V

STYLE 2

DSS

NTB52N10 = Device Code

PAK

ORDERING INFORMATION

http://onsemi.com

23 mW @ 10 V

N−Channel

(Pb−Free)

Package

DS(ON)

= Assembly Location

= Year

= Work Week

= Pb−Free Package

PAK

MARKING DIAGRAM

& PIN ASSIGNMENT

Publication Order Number:

Gate

TYP

NTB

52N10G

AYWW

Drain

800 / Tape & Reel

50 Units / Rail

Shipping

NTB52N10/D

Source

52 A

MAX

†

Related parts for NTB52N10G

NTB52N10G Summary of contents

Page 1

... AS °C/W R 0.7 Device qJC 62.5 R qJA NTB52N10 50 R qJA NTB52N10G T 260 °C L NTB52N10T4 NTB52N10T4G †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. 1 http://onsemi.com R TYP ...

Page 2

ELECTRICAL CHARACTERISTICS Characteristic OFF CHARACTERISTICS Drain−to−Source Breakdown Voltage ( Vdc 250 mAdc Temperature Coefficient (Positive) Zero Gate Voltage Drain Current ( Vdc 100 Vdc 25° ...

Page 3

T = 25° DRAIN−TO−SOURCE VOLTAGE (VOLTS) DS Figure ...

Page 4

Switching behavior is most easily modeled and predicted by recognizing that the power MOSFET is charge controlled. The lengths of various switching intervals (Dt) are determined by how fast the FET input capacitance can be charged by current from the ...

Page 5

TOTAL GATE CHARGE (nC) G Figure 8. Gate−To−Source and Drain−To−Source Voltage versus Total Charge ...

Page 6

SINGLE PULSE T = 25°C C 100 LIMIT DS(on) THERMAL LIMIT PACKAGE LIMIT 0.1 0 DRAIN−TO−SOURCE VOLTAGE (VOLTS) DS Figure 11. Maximum Rated Forward Biased Safe Operating ...

Page 7

... F VIEW W− 16.155 2X 1.016 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 7 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. 418B−01 THRU 418B−03 OBSOLETE, NEW STANDARD 418B− ...

Page 8

... Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303− ...

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