ADG441BR Analog Devices Inc, ADG441BR Datasheet - Page 12

• Manufacturer Part Number: ADG441BR
• Description: Analog Switch Quad SPST 16-Pin SOIC N
• Manufacturer: Analog Devices Inc
• Type: Analog Switchr
• Series: LC²MOSr

Specifications of ADG441BR

• Package: 16SOIC N
• Maximum On Resistance: 110@10.8V Ohm
• Maximum High Level Output Current: 30 mA
• Maximum Turn-off Time: 60@12V ns
• Maximum Turn-on Time: 150@12V ns
• Switch Architecture: SPST
• Power Supply Type: Single|Dual
• Rohs Status: RoHS non-compliant
• Function: Switch
• Circuit: 4 x SPST - NC
• On-state Resistance: 70 Ohm
• Voltage Supply Source: Single Supply
• Voltage - Supply, Single/dual (±): 12V
• Current - Supply: 1µA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (0.154", 3.90mm Width)

ADG441/ADG442/ADG444
TRENCH ISOLATION
NMOS
PMOS
In the ADG441A, ADG442A, and ADG444A, an insulating
oxide layer (trench) is placed between the NMOS and the
LOCO
PMOS transistors of each CMOS switch. Parasitic junctions,
which occur between the transistors in junction isolated
switches, are eliminated, and the result is a completely latch-up
proof switch.
In junction isolation, the N and P wells of the PMOS and
P-WELL
N-WELL
NMOS transistors form a diode that is reverse-biased under
normal operation. However, during overvoltage conditions, this
diode becomes forward-biased. A silicon-controlled rectifier
(SCR) type circuit is formed by the two transistors causing a
TRENCH
significant amplification of the current which, in turn, leads to
BURIED OXIDE LAYER
latch-up. With trench isolation, this diode is removed, and the
result is a latch-up proof switch.
SUBSTRATE (BACK GATE)
Figure 21. Trench Isolation
Rev. A | Page 12 of 16