AD9203ARU Analog Devices Inc, AD9203ARU Datasheet - Page 14

• Manufacturer Part Number: AD9203ARU
• Description: ADC Single Pipelined 40MSPS 10-Bit Parallel 28-Pin TSSOP
• Manufacturer: Analog Devices Inc

Specifications of AD9203ARU

• Package: 28TSSOP
• Resolution: 10 Bit
• Sampling Rate: 40 MSPS
• Architecture: Pipelined
• Number Of Analog Inputs: 1
• Digital Interface Type: Parallel
• Input Type: Voltage
• Signal To Noise Ratio: 60(Typ) dB
• Rohs Status: RoHS non-compliant
• Number Of Bits: 10
• Sampling Rate (per Second): 40M
• Data Interface: Parallel
• Number Of Converters: 5
• Power Dissipation (max): 108mW
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 28-TSSOP (0.173", 4.40mm Width)

AD9203
The structure of the input SHA places certain requirements on
the input drive source. The combination of the pin capacitance,
C
input source must be able to charge or discharge this
capacitance to 10-bit accuracy in one half of a clock cycle.
When the SHA goes into track mode, the input source must
charge or discharge capacitor C
on C
step on the input source must provide the charging current
through the R
CLK period) settle. This situation corresponds to driving a low
input impedance. Adding series resistance between the output
of the signal source and the AIN pin reduces the drive
requirements placed on the signal source. Figure 26 shows this
configuration. The bandwidth of the particular application
limits the size of this resistor. To maintain the performance
outlined in the data sheet specifications, the resistor should be
limited to 50 Ω or less. The series input resistor can be used to
isolate the driver from the AD9203’s switched capacitor input.
The external capacitor may be selected to limit the bandwidth
into the AD9203. Two input RC networks should be used to
balance differential input drive schemes (Figure 26).
The input span of the AD9203 is a function of the reference
voltage. For more information regarding the input range, see
the Internal Reference Connection and External Reference
Operation sections of the data sheet.
In many cases, particularly in single-supply operation, ac
coupling offers a convenient way of biasing the analog input
signal to the proper signal range. Figure 27 shows a typical
configuration for ac-coupling the analog input signal to the
AD9203. Maintaining the specifications outlined in the data
sheet requires careful selection of the component values. The
most important is the f
function of R2 and the parallel combination of C1 and C2.
P
, and the hold capacitance, C
H
to the new voltage. In the worst case, a full-scale voltage
Figure 26. Simple AD9203 Drive Configuration
ON
(100 Ω) of Switch 1 and quickly (within 1/2
V
S
C
C
P
P
Figure 25. Input Architecture
AD9203
S1
<50Ω
–3 dB
high-pass corner frequency. It is a
S3
H
H
, is typically less than 5 pF. The
from the voltage already stored
AIN
AD9203
C
C
H
H
S2
Rev. B | Page 14 of 28
The f
where C
C1 is typically a large electrolytic or tantalum capacitor that
becomes inductive at high frequencies. Add a small ceramic or
polystyrene capacitor (on the order of 0.01 µF) that is negligibly
inductive at higher frequencies while maintaining a low
impedance over a wide frequency range.
There are additional considerations when choosing the resistor
values for an ac-coupled input. The ac-coupling capacitors
integrate the switching transients present at the input of the
AD9203 and cause a net dc bias current, IB, to flow into the
input. The magnitude of the bias current increases as the signal
changes and as the clock frequency increases. This bias current
will result in an offset error of (R1 + R2) IB. If it is necessary to
compensate for this error, consider modifying VBIAS to
account for the resultant offset. In systems that must use dc
coupling, use an op amp to level shift ground-referenced signals
to comply with the input requirements of the AD9203.
OP AMP SELECTION GUIDE
Op amp selection for the AD9203 is highly application
dependent. In general, the performance requirements of any
given application can be characterized by either time domain or
frequency domain constraints. In either case, one should
carefully select an op amp that preserves the performance of the
A/D. This task becomes challenging when one considers the
AD9203’s high performance capabilities coupled with other
system level requirements such as power consumption and cost.
The ability to select the optimal op amp may be further
complicated by either limited power supply availability and/or
limited acceptable supplies for a desired op amp. Newer, high
performance op amps typically have input and output range
limitations in accordance with their lower supply voltages. As a
result, some op amps will be more appropriate in systems where
ac coupling is allowed. When dc coupling is required, the
headroom constraints of op amps (such as rail-to-rail op amps)
or ones where larger supplies can be used, should be
considered.
The following section describes some op amps currently
available from Analog Devices. Please contact the factory or
local sales office for updates on Analog Devices latest amplifier
product offerings.
f
–3 dB
−3dB
EQ
point can be approximated by the equation:
= 1/(2π × [R2] C
is the parallel combination of C1 and C2. Note that
V
IN
Figure 27. AC-Coupled Input
AVDD/2
C1
C2
EQ
)
+
R2
–
V
BIAS
R1
AD9203
AIN