89HPES16T4ZHBCG Integrated Device Technology (Idt), 89HPES16T4ZHBCG Datasheet

no-image

89HPES16T4ZHBCG

Manufacturer Part Number
89HPES16T4ZHBCG
Description
PCI Express Switch 484-Pin CABGA Tray
Manufacturer
Integrated Device Technology (Idt)
Datasheet

Specifications of 89HPES16T4ZHBCG

Package
484CABGA
Operating Temperature
0 to 70 °C
Device Overview
Express® switching solutions. The PES16T4 is a 16-lane, 4-port periph-
eral chip that performs PCI Express packet switching with a feature set
optimized for high performance applications such as servers, storage,
and communications/networking. It provides connectivity and switching
functions between a PCI Express upstream port and up to three down-
stream ports and supports switching between downstream ports.
Features
Block Diagram
© 2008 Integrated Device Technology, Inc.
The 89HPES16T4 is a member of the IDT PRECISE™ family of PCI
SerDes
Logical
– Sixteen 2.5 Gbps PCI Express lanes
– Four switch ports
– Upstream port configurable up to x8
– Downstream ports configurable up to x4
– Low-latency cut-through switch architecture
– Support for Max Payload Size up to 2048 bytes
– One virtual channel
– Eight traffic classes
– PCI Express Base Specification Revision 1.1 compliant
Layer
High Performance PCI Express Switch
Phy
Multiplexer / Demultiplexer
Transaction Layer
Data Link Layer
SerDes
Logical
Layer
Phy
(Port 0)
SerDes
Logical
Layer
Phy
Frame Buffer
SerDes
Logical
Layer
IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc.
Phy
®
SerDes
Logical
Layer
Phy
16-Lane 4-Port PCI
Express® Switch
Multiplexer / Demultiplexer
Transaction Layer
4-Port Switch Core / 16 PCI Express Lanes
Data Link Layer
SerDes
Logical
Layer
Phy
(Port 1)
Route Table
SerDes
Figure 1 Internal Block Diagram
Logical
Layer
Phy
SerDes
Logical
Layer
Phy
1 of 31
SerDes
Logical
Layer
Phy
Multiplexer / Demultiplexer
Arbitration
– Automatic per port link width negotiation to x8, x4, x2 or x1
– Automatic lane reversal on all ports
– Automatic polarity inversion on all lanes
– Ability to load device configuration from serial EEPROM
– PCI compatible INTx emulation
– Bus locking
– Requires no external components
– Incorporates on-chip internal memory for packet buffering and
– Integrates sixteen 2.5 Gbps embedded SerDes with 8B/10B
– Supports ECRC and Advanced Error Reporting
– Internal end-to-end parity protection on all TLPs ensures data
– Supports PCI Express Native Hot-Plug, Hot-Swap capable I/O
– Compatible with Hot-Plug I/O expanders used on PC and
Transaction Layer
Flexible Architecture with Numerous Configuration Options
Legacy Support
Highly Integrated Solution
Reliability, Availability, and Serviceability (RAS) Features
Data Link Layer
SerDes
Logical
Port
Layer
Phy
queueing
encoder/decoder (no separate transceivers needed)
integrity even in systems that do not implement end-to-end
CRC (ECRC)
server motherboards
(Port 6)
SerDes
Logical
Layer
Phy
SerDes
Logical
Layer
Phy
Scheduler
SerDes
Logical
Layer
Phy
Multiplexer / Demultiplexer
Transaction Layer
Data Link Layer
SerDes
Logical
Layer
Phy
(Port 7)
89HPES16T4
Data Sheet
SerDes
Logical
March 25, 2008
Layer
Phy
SerDes
Logical
Layer
Phy
DSC 6923

Related parts for 89HPES16T4ZHBCG

89HPES16T4ZHBCG Summary of contents

Page 1

Device Overview The 89HPES16T4 is a member of the IDT PRECISE™ family of PCI Express® switching solutions. The PES16T4 is a 16-lane, 4-port periph- eral chip that performs PCI Express packet switching with a feature set optimized for high ...

Page 2

IDT 89HPES16T4 Data Sheet Power Management – Utilizes advanced low-power design techniques to achieve low typical power consumption – Supports PCI Power Management Interface specification (PCI-PM 1.1) • Supports device power management states: D0 cold – Unused SerDes ...

Page 3

IDT 89HPES16T4 Data Sheet Processor SMBus PES16T4 Master SSMBCLK SSMBDAT MSMBCLK MSMBDAT (a) Unified Configuration and Management Bus Hot-Plug Interface The PES16T4 supports PCI Express Hot-Plug on each downstream port. To reduce the number of pins required on the device, ...

Page 4

IDT 89HPES16T4 Data Sheet Pin Description The following tables list the functions of the pins provided on the PES16T4. Some of the functions listed may be multiplexed onto the same pin. The active polarity of a signal is defined using ...

Page 5

IDT 89HPES16T4 Data Sheet Signal MSMBADDR[4:1] MSMBCLK MSMBDAT SSMBADDR[5,3:1] SSMBCLK SSMBDAT Signal GPIO[0] GPIO[1] GPIO[2] GPIO[3] GPIO[4] GPIO[5] GPIO[6] GPIO[7] Type Name/Description I Master SMBus Address. These pins determine the SMBus address of the serial EEPROM from which configuration information ...

Page 6

IDT 89HPES16T4 Data Sheet Signal GPIO[8] GPIO[11] GPIO[12] Signal CCLKDS CCLKUS MSMBSMODE PERSTN RSTHALT SWMODE[2:0] Type Name/Description I/O General Purpose I/O. This pin can be configured as a general purpose I/O pin. Alternate function pin name: P1RSTN Alternate function pin ...

Page 7

IDT 89HPES16T4 Data Sheet Signal JTAG_TCK JTAG_TDI JTAG_TDO JTAG_TMS JTAG_TRST_N Signal V CORE APE Type Name/Description I JTAG Clock. This is an input test clock used ...

Page 8

IDT 89HPES16T4 Data Sheet Pin Characteristics Note: Some input pads of the PES16T4 do not contain internal pull-ups or pull-downs. Unused inputs should be tied off to appropriate levels. This is especially critical for unused control signal inputs which, if ...

Page 9

IDT 89HPES16T4 Data Sheet Function EJTAG / JTAG 1. Internal resistor values under typical operating conditions are 54K Ω for pull-up and 251K Ω for pull-down. 2. Schmitt Trigger Input (STI). Logic Diagram — PES16T4 Reference Clocks PCI Express Switch ...

Page 10

IDT 89HPES16T4 Data Sheet System Clock Parameters Values based on systems running at recommended supply voltages and operating temperatures, as shown in Tables 13 and 14. Parameter Refclk Input reference clock frequency range FREQ 2 Refclk Duty cycle of input ...

Page 11

IDT 89HPES16T4 Data Sheet Signal GPIO 1 GPIO[10:0] 1. GPIO signals must meet the setup and hold times if they are synchronous or the minimum pulse width if they are asynchronous. 2. The values for this symbol were determined by ...

Page 12

IDT 89HPES16T4 Data Sheet JTAG_TCK JTAG_TDI JTAG_TMS JTAG_TDO JTAG_TRST_N Recommended Operating Supply Voltages Symbol V CORE Internal logic supply DD V I/O I/O supply except for SerDes LVPECL/CML PCI Express Digital Power DD V APE PCI Express ...

Page 13

IDT 89HPES16T4 Data Sheet Recommended Operating Temperature Power Consumption Typical power is measured under the following conditions: 25°C Ambient, 35% total link usage on all ports, typical voltages defined in Table 13 (and also listed below). Maximum power is measured ...

Page 14

IDT 89HPES16T4 Data Sheet Heat Sink Table 17 lists heat sink requirements for the PES16T4 under three common usage scenarios. As shown in this table, a heat sink is not required in most cases. . Air Flow Zero 3.9”x6.2” (ExpressModule ...

Page 15

IDT 89HPES16T4 Data Sheet DC Electrical Characteristics Values based on systems running at recommended supply voltages, as shown in Table 13. Note: See Table 8, Pin Characteristics, for a complete I/O listing. I/O Type Parameter Serial Link PCIe Transmit V ...

Page 16

IDT 89HPES16T4 Data Sheet I/O Type Parameter Other I/Os LOW Drive I OL Output I OH High Drive I OL Output I OH Schmitt Trig ger Input V IH (STI) Input Capacitance C IN ...

Page 17

IDT 89HPES16T4 Data Sheet Package Pinout — 484-BGA Signal Pinout for PES16T4 The following table lists the pin numbers and signal names for the PES16T4 device. Pin Function Alt Pin A1 V B13 B14 ...

Page 18

IDT 89HPES16T4 Data Sheet Pin Function Alt Pin G5 V H20 CORE H21 H22 G10 V CORE J3 DD G11 G12 V ...

Page 19

IDT 89HPES16T4 Data Sheet Pin Function Alt Pin N21 V R14 SS N22 PEREFCLKN2 R15 P1 PEREFCLKN1 R16 P2 V R17 R18 R19 R20 R21 ...

Page 20

IDT 89HPES16T4 Data Sheet Pin Function Alt Pin Y15 PE7RP01 AA6 Y16 V AA7 SS Y17 PE7RN02 AA8 Y18 V AA9 SS Y19 PE7RP03 AA10 Y20 V CORE AA11 DD Y21 V AA12 SS Y22 V CORE AA13 DD AA1 ...

Page 21

IDT 89HPES16T4 Data Sheet Power Pins V Core V Core J10 C22 J12 E1 J18 E22 J22 F5 K5 F10 K7 F14 K9 F16 K11 G1 K13 G6 K15 G10 K17 G13 L1 G22 ...

Page 22

IDT 89HPES16T4 Data Sheet Ground Pins C16 A2 C18 A3 C20 A11 D8 A13 D10 A15 D12 A17 D14 A19 D18 A20 D20 A21 D22 A22 ...

Page 23

IDT 89HPES16T4 Data Sheet Signals Listed Alphabetically Signal Name CCLKDS CCLKUS GPIO_00 GPIO_01 GPIO_02 GPIO_03 GPIO_04 GPIO_05 GPIO_06 GPIO_07 GPIO_08 GPIO_11 GPIO_12 JTAG_TCK JTAG_TDI JTAG_TDO JTAG_TMS JTAG_TRST_N MSMBADDR_1 MSMBADDR_2 MSMBADDR_3 MSMBADDR_4 MSMBCLK MSMBDAT MSMBSMODE P01MERGEN P67MERGEN PE0RN00 PE0RN01 PE0RN02 PE0RN03 ...

Page 24

IDT 89HPES16T4 Data Sheet Signal Name PE0RP03 PE0TN00 PE0TN01 PE0TN02 PE0TN03 PE0TP00 PE0TP01 PE0TP02 PE0TP03 PE1RN00 PE1RN01 PE1RN02 PE1RN03 PE1RP00 PE1RP01 PE1RP02 PE1RP03 PE1TN00 PE1TN01 PE1TN02 PE1TN03 PE1TP00 PE1TP01 PE1TP02 PE1TP03 PE6RN00 PE6RN01 PE6RN02 PE6RN03 PE6RP00 PE6RP01 PE6RP02 PE6RP03 PE6TN00 ...

Page 25

IDT 89HPES16T4 Data Sheet Signal Name PE6TN03 PE6TP00 PE6TP01 PE6TP02 PE6TP03 PE7RN00 PE7RN01 PE7RN02 PE7RN03 PE7RP00 PE7RP01 PE7RP02 PE7RP03 PE7TN00 PE7TN01 PE7TN02 PE7TN03 PE7TP00 PE7TP01 PE7TP02 PE7TP03 PEREFCLKN1 PEREFCLKN2 PEREFCLKP1 PEREFCLKP2 PERSTN REFCLKM RSTHALT SSMBADDR_1 SSMBADDR_2 SSMBADDR_3 SSMBADDR_5 SSMBCLK SSMBDAT ...

Page 26

IDT 89HPES16T4 Data Sheet Signal Name SWMODE_0 SWMODE_1 SWMODE_2 V CORE APE I/O Type Location I E20 I E21 I F21 See Table 21 for a ...

Page 27

IDT 89HPES16T4 Data Sheet PES16T4 Pinout — Top View ...

Page 28

IDT 89HPES16T4 Data Sheet PES16T4 Package Drawing — 484-Pin BC484/BCG484 March 25, 2008 ...

Page 29

IDT 89HPES16T4 Data Sheet PES16T4 Package Drawing — Page Two March 25, 2008 ...

Page 30

IDT 89HPES16T4 Data Sheet Revision History February 8, 2007: Initial publication. April 4, 2007: In Table 3, revised description for MSMBCLK signal. May 30, 2007: Changed device revision in Ordering Information from ZD to ZH. November 1, 2007: Changed package ...

Page 31

... A AAA NN Product Operating Device Family Family Voltage Valid Combinations 89HPES16T4ZHBC 484-ball CABGA package, Commercial Temperature 89HPES16T4ZHBCG 484-ball Green CABGA package, Commercial Temperature CORPORATE HEADQUARTERS 6024 Silver Creek Valley Road San Jose, CA 95138 ® NNAN AA AA Package Temp Range Product Device Detail ...

Related keywords