74LVC541APW NXP Semiconductors, 74LVC541APW Datasheet - Page 10

• Manufacturer Part Number: 74LVC541APW
• Description: Buffer/Line Driver 8-CH Non-Inverting 3-ST CMOS 20-Pin TSSOP Tube
• Manufacturer: NXP Semiconductors

Specifications of 74LVC541APW

• Package: 20TSSOP
• Logic Family: LVC
• Logic Function: Buffer/Line Driver
• Number Of Outputs Per Chip: 8
• Output Type: 3-State
• Input Signal Type: Single-Ended
• Maximum Propagation Delay Time @ Maximum Cl: 14(Typ)@1.2V|3.9(Typ)@2.7V|3.3(Typ)@3.3V ns
• Tolerant I/os: 5 V
• Typical Quiescent Current: 0.1 uA
• Polarity: Non-Inverting

Philips Semiconductors
AC WAVEFORMS
2003 Nov 12
handbook, full pagewidth
Octal buffer/line driver with 5 V
tolerant inputs/outputs (3-state)
1.2 V
2.7 V
3.0 to 3.6 V
1.2 V
2.7 V
3.0 to 3.6 V
V
V
CC
CC
0.5
1.5 V
1.5 V
0.5
1.5 V
1.5 V
V
V
V
V
M
HIGH-to-OFF
M
OFF-to-HIGH
CC
LOW-to-OFF
OFF-to-LOW
CC
OEn input
output
output
handbook, halfpage
Fig.6 Input (An) to output (YN) propagation delays.
V
2.7 V
2.7 V
V
2.7 V
2.7 V
Yn output
An input
CC
CC
GND
GND
V OH
V CC
V OL
Fig.7 3-state enable and disable times.
V
V I
V
I
I
INPUT
INPUT
GND
V OH
V OL
V I
enabled
V M
outputs
2.5 ns
2.5 ns
2.5 ns
2.5 ns
2.5 ns
2.5 ns
t PLZ
t
t
t PHZ
r
r
= t
= t
f
f
V M
V X
10
V Y
V M
t PHL
V
output load.
V
V
V
V
V
output load.
OL
X
X
Y
Y
OL
disabled
outputs
= V
= V
= V
= V
and V
and V
OL
OL
OH
OH
+ 0.3 V at V
+ 0.1 V at V
OH
OH
0.3 V at V
0.1 V at V
t PZL
t PZH
are typical output voltage drop that occur with the
are typical output voltage drop that occur with the
MNA901
t PLH
V M
CC
CC
CC
CC
V M
< 2.7 V;
< 2.7 V.
2.7 V;
enabled
2.7 V;
outputs
MNA902
Product specification
74LVC541A