XC2S100E-6PQ208C Xilinx Inc, XC2S100E-6PQ208C Datasheet - Page 83

• Manufacturer Part Number: XC2S100E-6PQ208C
• Description: FPGA Spartan®-IIE Family 100K Gates 2700 Cells 357MHz 0.15um Technology 1.8V 208-Pin PQFP
• Manufacturer: Xilinx Inc
• Series: Spartan™-IIEr

Specifications of XC2S100E-6PQ208C

• Package: 208PQFP
• Family Name: Spartan®-IIE
• Device Logic Cells: 2700
• Device Logic Units: 600
• Device System Gates: 100000
• Maximum Internal Frequency: 357 MHz
• Typical Operating Supply Voltage: 1.8 V
• Maximum Number Of User I/os: 146
• Ram Bits: 40960
• Number Of Logic Elements/cells: 2700
• Number Of Labs/clbs: 600
• Total Ram Bits: 40960
• Number Of I /o: 146
• Number Of Gates: 100000
• Voltage - Supply: 1.71 V ~ 1.89 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 208-BFQFP
• Case: QFP208
• Dc: 03+
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 122-1207

FG456 Pinouts (XC2S100E, XC2S150E, XC2S200E, XC2S300E, XC2S400E, XC2S600E)
DS077-4 (2.3) June 18, 2008
Product Specification
I/O, L#P
I/O, L#N
I/O, L#P
I/O
I/O (D3)
I/O, VREF
Bank 2,
L#N
I/O, L#P
I/O, L#N
I/O, L#P
I/O, L#N
I/O, L#P
I/O
I/O, L#N
I/O, L#P
I/O, L#N
I/O (D2),
L#P
I/O (D1),
L#N
I/O, VREF
Bank 2,
L#P
I/O
I/O
Function Bank
Pad Name
R
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
K22
K21
K20
K19
K18
K17
H22
H21
H20
H19
H18
G22
L17
F22
Pin
J22
J21
J20
J19
J18
J17
150E, 200E,
150E, 300E,
150E, 200E,
200E, 300E,
150E, 200E,
200E, 300E,
300E, 400E,
200E, 300E,
200E, 300E,
XC2S100E,
300E, 600E
XC2S100E,
XC2S300E,
XC2S100E,
200E, 400E
XC2S150E,
300E, 600E
XC2S300E,
XC2S150E,
XC2S100E,
300E, 600E
XC2S100E,
XC2S150E,
400E, 600E
XC2S200E,
XC2S150E,
400E, 600E
XC2S150E,
400E, 600E
XC2S300E,
400E, 600E
XC2S300E,
400E, 600E
XC2S100,
Async.
Output
Option
LVDS
400E
400E
400E
600E
600E
150E
600E
-
-
-
-
XC2S400E,
Option
600E
V
All
All
REF
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
I/O, L29P_Y I/O, L40P_Y
I/O, L28P_Y
I/O, L27P_Y
I/O, VREF
I/O, VREF
I/O (D1),
L29N_Y
I/O (D3)
L28N_Y
L27N_Y
I/O (D2)
Bank 2,
Bank 2,
100E
L26N
L26P
I/O,
I/O,
www.xilinx.com
I/O
I/O
I/O
-
-
-
-
-
-
-
I/O, L38P_Y
I/O, L37P_Y I/O, L39P_Y I/O, L39P_Y
I/O, L36P_Y
I/O, VREF
I/O, VREF
I/O (D3),
I/O (D2),
I/O (D1),
L40N_Y
L38N_Y
L37N_Y
L36N_Y
L35N_Y
L35P_Y
Bank 2,
Bank 2,
L39N
L34N
150E
L39P
L34P
I/O,
I/O,
I/O,
I/O,
I/O,
I/O
-
-
-
-
-
Device-Specific Pinouts: XC2S
I/O, L43P_Y I/O, L43P_Y
I/O, L41P_Y
I/O, L38P_Y I/O, L38P_Y I/O, L38P_Y I/O, L38P_Y
I/O, VREF
I/O, VREF
I/O, L42N
I/O, L40N
I/O, L42P
I/O, L40P
I/O (D2),
I/O (D1),
I/O (D3)
L41N_Y
L39N_Y
L38N_Y
L37N_Y
L37P_Y
Bank 2,
Bank 2,
200E
L36N
L36P
I/O,
I/O,
I/O,
I/O
I/O
Spartan-IIE FPGA Family: Pinout Tables
-
-
I/O, L42P_Y I/O, L42P_Y
I/O, L40P_Y
I/O, VREF
I/O, VREF
I/O, L41P
I/O (D2),
I/O (D1),
L42N_Y
L40N_Y
L39N_Y
L38N_Y
L37N_Y
L36N_Y
I/O (D3)
L37P_Y
L36P_Y
Bank 2,
Bank 2,
L41N
300E
I/O,
I/O,
I/O,
I/O,
I/O,
I/O
I/O
I/O
I/O
I/O, L41P_Y
I/O, VREF
I/O, VREF
I/O, VREF
I/O, L40N
I/O, L39N
I/O, L40P
I/O, L39P
I/O (D2),
I/O (D1),
L42N_Y
I/O (D3)
L41N_Y
L38N_Y
L37N_Y
L37P_Y
L36N_Y
L36P_Y
Bank 2,
Bank 2,
Bank 2,
400E
L43P
I/O,
I/O,
I/O,
I/O
I/O
I/O
I/O
I/O, L40P_Y
I/O, L39P_Y
I/O, VREF
I/O, VREF
I/O, VREF
I/O, L42N
I/O, L42P
I/O, L41P
I/O (D2),
I/O (D1),
L40N_Y
L39N_Y
L38N_Y
L37N_Y
L36N_Y
L43P_Y
I/O (D3)
L37P_Y
L36P_Y
Bank 2,
Bank 2,
Bank 2,
L41N
600E
I/O,
I/O,
I/O,
I/O,
I/O
I/O
I/O
I/O
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