XC3S500E-5PQG208C Xilinx Inc, XC3S500E-5PQG208C Datasheet - Page 148

• Manufacturer Part Number: XC3S500E-5PQG208C
• Description: FPGA Spartan®-3E Family 500K Gates 10476 Cells 657MHz 90nm (CMOS) Technology 1.2V 208-Pin PQFP
• Manufacturer: Xilinx Inc
• Series: Spartan™-3Er

Specifications of XC3S500E-5PQG208C

• Package: 208PQFP
• Family Name: Spartan®-3E
• Device Logic Cells: 10476
• Device Logic Units: 1164
• Device System Gates: 500000
• Number Of Registers: 9312
• Maximum Internal Frequency: 657 MHz
• Typical Operating Supply Voltage: 1.2 V
• Maximum Number Of User I/os: 158
• Ram Bits: 368640
• Package / Case: 208-MQFP, 208-PQFP
• Mounting Type: Surface Mount
• Voltage - Supply: 1.1 V ~ 3.465 V
• Operating Temperature: 0°C ~ 85°C
• Number Of I /o: 158
• Number Of Logic Elements/cells: *
• Number Of Gates: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

DC and Switching Characteristics
Table 109: Switching Characteristics for the PS in Variable Phase Mode (Continued)
Notes:
1.
2.
3.
148
The numbers in this table are based on the operating conditions set forth in
The maximum variable phase shift range, MAX_STEPS, is only valid when the DCM is has no initial fixed phase shifting, i.e., the PHASE_SHIFT
attribute is set to 0.
The DCM_DELAY_STEP values are provided at the bottom of
Symbol
Description
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Table
105.
Table 77
and
Table
108.
Equation
DS312-3 (v3.8) August 26, 2009
Product Specification
Units
R