XC5VLX30T-1FF665C Xilinx Inc, XC5VLX30T-1FF665C Datasheet - Page 70

• Manufacturer Part Number: XC5VLX30T-1FF665C
• Description: FPGA Virtex®-5 Family 30720 Cells 65nm (CMOS) Technology 1V 665-Pin FCBGA
• Manufacturer: Xilinx Inc

Specifications of XC5VLX30T-1FF665C

• Package: 665FCBGA
• Family Name: Virtex®-5
• Device Logic Units: 30720
• Typical Operating Supply Voltage: 1 V
• Maximum Number Of User I/os: 360
• Ram Bits: 1327104

Table 91: Global Clock Setup and Hold Without DCM or PLL (Cont’d)
DS202 (v5.3) May 5, 2010
Product Specification
Notes:
1.
2.
3.
T
PSFD
Setup and Hold times are measured over worst case conditions (process, voltage, temperature). Setup time is measured relative to the
Global Clock input signal using the slowest process, highest temperature, and lowest voltage. Hold time is measured relative to the Global
Clock input signal using the fastest process, lowest temperature, and highest voltage.
IFF = Input Flip-Flop or Latch
A Zero "0" Hold Time listing indicates no hold time or a negative hold time. Negative values can not be guaranteed "best-case", but if a "0"
is listed, there is no positive hold time.
Symbol
/ T
PHFD
Full Delay (Legacy Delay or Default Delay)
Global Clock and IFF
Description
(2)
without DCM or PLL
www.xilinx.com
Virtex-5 FPGA Data Sheet: DC and Switching Characteristics
XC5VTX150T
XC5VTX240T
XC5VFX30T
XC5VFX70T
XC5VFX100T
XC5VFX130T
XC5VFX200T
Device
–0.27
–0.30
–0.42
–0.55
2.05
1.85
2.20
2.33
N/A
N/A
N/A
-3
Speed Grade
–0.82
–0.85
–0.27
–0.30
–0.42
–0.54
–0.43
2.35
2.59
2.25
2.06
2.38
2.59
2.52
-2
–0.82
–0.85
–0.27
–0.30
–0.42
–0.54
–0.43
2.59
2.87
2.57
2.35
2.66
2.95
2.81
-1
Units
ns
ns
ns
ns
ns
ns
ns
70