MAX2769ETI+ Maxim Integrated Products, MAX2769ETI+ Datasheet
MAX2769ETI+
Specifications of MAX2769ETI+
Related parts for MAX2769ETI+
MAX2769ETI+ Summary of contents
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... Cascade Noise Figure o Integrated Crystal Oscillator o Integrated Active Antenna Sensor o 10mA Supply Current in Low-Power Mode o 2.7V to 3.3V Supply Voltage o Small, 28-Pin, RoHS-Compliant, Thin QFN Lead- Free Package (5mm x 5mm) PART MAX2769ETI+ MAX2769E/W + Denotes a lead(Pb)-free/RoHS-compliant package Exposed paddle. Pin Configuration/Block Diagram N.C. 22 Applications ...
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... Acti ve Antenna D etecti ent To asser TFLAG DIGITAL INPUT AND OUTPUT Measure at the SHDN pin Digital Input Logic-High Measure at the SHDN pin Digital Input Logic-Low Idle Mode is a trademark of Maxim Integrated Products, Inc. 2 _______________________________________________________________________________________ Operating Temperature Range ...........................-40°C to +85°C + 0.3V) Junction Temperature ......................................................+150°C CC Storage Temperature Range .............................-65° ...
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AC ELECTRICAL CHARACTERISTICS (MAX2769 EV kit 2.7V to 3.3V driven from a 50Ω source. All RF measurements are done in the analog output mode with ADC bypassed. PGA gain is set to 51dB gain by ...
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Universal GPS Receiver AC ELECTRICAL CHARACTERISTICS (continued) (MAX2769 EV kit 2.7V to 3.3V driven from a 50Ω source. All RF measurements are done in the analog output mode with ADC bypassed. PGA gain is set ...
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EV kit 2.7V to 3.3V driven from a 50Ω source. All RF measurements are done in the analog output mode with ADC bypassed. PGA gain is set to 51dB gain by serial-interface word GAININ ...
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Universal GPS Receiver (MAX2769 EV kit 2.7V to 3.3V driven from a 50Ω source. All RF measurements are done in the analog output mode with ADC bypassed. PGA gain is set to 51dB gain by ...
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EV kit 2.7V to 3.3V driven from a 50Ω source. All RF measurements are done in the analog output mode with ADC bypassed. PGA gain is set to 51dB gain by serial-interface word GAININ ...
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Universal GPS Receiver (MAX2769 EV kit 2.7V to 3.3V driven from a 50Ω source. All RF measurements are done in the analog output mode with ADC bypassed. PGA gain is set to 51dB gain by ...
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TOP VIEW 21 N. VCCIF 23 IDLE 24 LNA2 25 PGM 26 C0 LNA1 27 N. Table 1. Component List DESIGNATION QUANTITY C0 1 0.47nF AC-coupling capacitor C1 1 27pF PLL loop filter capacitor C2 ...
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Universal GPS Receiver PIN NAME Active Antenna Flag Logic Output. A logic-high indicates that an active antenna is connected to the 1 ANTFLAG ANTBIAS pin. 2 LNAOUT LNA Output. The LNA output is internally matched to 50Ω. 3 ANTBIAS Buffered ...
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Detailed Description Integrated Active Antenna Sensor The MAX2769 includes a low-dropout switch to bias an external active antenna. To activate the antenna switch output, set ANTEN in the Configuration 1 register to logic 1. This closes the switch that connects ...
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Universal GPS Receiver Table 2. Output Data Format SIGN/MAGNITUDE INTEGER VALUE 1b 1. 011 001 001 000 - 000 ...
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Figure 2. ADC Quantization Levels for 2- and 3-Bit Cases MSB is output at I1, the second bit is at I0, and the LSB is at Q1. Figure 2 illustrates the ADC quantization levels for ...
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Universal GPS Receiver ADCCLK_SEL REF/XTAL THROUGH PIN SERCLK_SEL REFDIV<1:0> Figure 3. DSP Interface Top-Level Connectivity and Control Signals ter. This selects between bit ; bit and bit 0 0 and bit , bit , bit , ...
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Preconfigured Device States When a serial interface is not available, the device can be used in preconfigured states that don’t require pro- gramming through the serial interface. Connecting the PGM pin to logic-high and SCLK, SDATA, and CS pins to ...
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Universal GPS Receiver Table 4. Serial-Interface Timing Requirements SYMBOL Falling edge rising edge of the first SCLK time. t CSS t Data to serial-clock setup time Data to clock hold time Serial clock ...
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Table 6. Configuration 1 (Address: 0000) DEFAULT DATA BIT LOCATION VALUE CHIPEN 27 1 IDLE 26 0 ILNA1 25:22 1000 ILNA2 21:20 10 ILO 19:18 10 IMIX 17:16 01 MIXPOLE 15 0 LNAMODE 14:13 00 MIXEN 12 1 ANTEN 11 ...
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Universal GPS Receiver Table 7. Configuration 2 (Address: 0001) DEFAULT DATA BIT LOCATION VALUE IQEN 27 0 GAINREF 26:15 170d — 14:13 00 AGCMODE 12:11 00 FORMAT 10:9 01 BITS 8:6 010 DRVCFG 5:4 00 LOEN 3 1 RESERVED 2 ...
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Table 8. Configuration 3 (Address: 0010) DEFAULT DATA BIT LOCATION VALUE GAININ 27:22 111010 FSLOWEN 21 1 HILOADEN 20 0 ADCEN 19 1 DRVEN 18 1 FOFSTEN 17 1 FILTEN 16 1 FHIPEN 15 1 — PGAIEN 13 ...
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Universal GPS Receiver Table 9. PLL Configuration (Address: 0011) DEFAULT DATA BIT LOCATION VALUE VCOEN 27 IVCO 26 — 25 REFOUTEN 24 — 23 REFDIV 22:21 11 IXTAL 20:19 01 XTALCAP 18:14 10000 LDMUX 13:10 0000 ICP 9 PFDEN 8 ...
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Table 10. PLL Integer Division Ratio (Address 0100) DEFAULT DATA BIT LOCATION VALUE NDIV 27:13 1536d RDIV 12:3 16d — 2:0 000 Table 11. PLL Division Ratio (Address 0101) DEFAULT DATA BIT LOCATION VALUE FDIV 27:8 80000h — 7:0 01110000 ...
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Universal GPS Receiver Applications Information The LNA and mixer inputs require careful consideration in matching to 50Ω lines. Proper supply bypassing, grounding, and layout are required for reliable perfor- mance from any RF circuit. Low-Power Operation The MAX2769 can be ...
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... Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 23 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2010 Maxim Integrated Products ...