MAX1471ATJ+T Maxim Integrated Products, MAX1471ATJ+T Datasheet - Page 22

• Manufacturer Part Number: MAX1471ATJ+T
• Description: RF Receiver IC RCVR ASK/FSK LP wer 3V/5V ASK/FSK Su
• Manufacturer: Maxim Integrated Products
• Type: Receiverr

Specifications of MAX1471ATJ+T

• Package / Case: TQFN-32 EP
• Operating Frequency: 450 MHz
• Operating Supply Voltage: 2.5 V, 3.3 V, 5 V
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

A properly designed PCB is an essential part of any
RF/microwave circuit. On high-frequency inputs and
outputs, use controlled-impedance lines and keep
them as short as possible to minimize losses and radia-
tion. At high frequencies, trace lengths that are on the
order of λ/10 or longer act as antennas.
Keeping the traces short also reduces parasitic induc-
tance. Generally, 1in of a PCB trace adds about 20nH
of parasitic inductance. The parasitic inductance can
315MHz/434MHz Low-Power, 3V/5V
ASK/FSK Superheterodyne Receiver
Table 7. Configuration Register (Address: 0x1)
22
FSKCALLSB
DRX_MODE
DOUT_ASK
DOUT_FSK
TOFF_PS1
TOFF_PS0
GAINSET
______________________________________________________________________________________
BIT ID
X
Off-timer prescale
Off-timer prescale
ASKOUT enable
FSKOUT enable
Receive mode
FSK accurate
BIT NAME
Don’t care
calibration
Gain set
Layout Considerations
BIT LOCATION
(0 = LSB)
7
6
5
4
3
2
1
0
POWER-UP
STATE
0
1
0
0
0
0
0
0
have a dramatic effect on the effective inductance of a
passive component. For example, a 0.5in trace con-
necting a 100nH inductor adds an extra 10nH of induc-
tance or 10%.
To reduce the parasitic inductance, use wider traces
and a solid ground or power lane below the signal
traces. Also, use low-inductance connections to ground
on all GND pins, and place decoupling capacitors
close to all V
Don’t care.
0 = LNA low-gain state.
1 = LNA high-gain state.
For manual gain control, enable the AGC (AGC_EN =
1), set LNA gain state to desired setting, then disable
the AGC (AGC_EN = 0).
FSKCALLSB = 1 enables a longer, more accurate
FSK calibration.
FSKCALLSB = 0 provides for a quick, less accurate
FSK calibration.
This bit enables the FDATA pin to act as the serial
data output in 4-wire mode. (See the Communication
Protocol section.)
This bit enables the ADATA pin to act as the serial
data output in 4-wire mode. (See the Communication
Protocol section.)
Sets LSB size for the off timer. (See the Off Timer
section.)
1 = Discontinuous receive mode. (See the
Discontinuous Receive Mode section.)
0 = Continuous receive mode. (See the Continuous
Receive Mode section.)
DD
or HVIN connections.
FUNCTION