AX5131-TSSOP20-TU AXSEM, AX5131-TSSOP20-TU Datasheet
AX5131-TSSOP20-TU
Specifications of AX5131-TSSOP20-TU
Related parts for AX5131-TSSOP20-TU
AX5131-TSSOP20-TU Summary of contents
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... DATASHEET AX5131 Version 1.0 ...
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... Document Type Datasheet Document Status Preliminary Document Version Version 1.0 Product AX5131 Version 1.0 Datasheet AX5131 ...
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... Crystal Oscillator ........................................................................................................................... 12 RF Frequency Generation Subsystem (Synthesizer) ................................................................ 13 Transmitter...................................................................................................................................... 14 SPI Timing........................................................................................................................................ 15 5. Circuit Description ................................................................................................................... 16 5.1. Voltage Regulator ....................................................................................................................... 17 5.2. Crystal Oscillator........................................................................................................................... 17 5.3. SYSCLK Output.............................................................................................................................. 18 5.4. Power-on-reset (POR) .................................................................................................................. 18 5.5. RF Frequency Generation Subsystem....................................................................................... 18 VCO ................................................................................................................................................ 19 VCO Auto-Ranging ...................................................................................................................... 19 Loop Filter and Charge Pump .................................................................................................... 19 Version 1.0 3 Table of Contents Datasheet AX5131 ...
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... Register Bank Description ....................................................................................................... 26 6.1. Control Register Map................................................................................................................... 27 7. Application Information.......................................................................................................... 30 7.1. Typical Application Diagram ..................................................................................................... 30 7.2. Antenna Interface Circuitry........................................................................................................ 31 Single-Ended Antenna Interface ............................................................................................... 31 7.3. Voltage Regulator ....................................................................................................................... 31 8. QFN20 Package Information .................................................................................................. 32 8.1. Package Outline TSSOP20 .......................................................................................................... 32 9. Life Support Applications ........................................................................................................ 35 10. Contact Information ................................................................................................................ 36 Version 1.0 Datasheet AX5131 ...
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... Toys • Wireless audio • Wireless networks • Wireless USB • Access control • Remote keyless entry • ARIB compatible • Pointing devices and keyboards • Active RFID • RFID base station transmitter • 433/868/915 MHz SRD band systems Datasheet AX5131 5 ...
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... Block Diagram 2. Block Diagram ANTP PA ANTN Crystal Oscillator F XTAL typ. 16 MHz Divider Figure 1 Functional block diagram of the AX5131 Version 1.0 AX5131 Modulator F OUT RF Frequency Generation Subsystem Chip configuration Voltage POR Regulator Communication Controller & Serial Interface Datasheet AX5131 ...
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... Can be programmed to be used as a general purpose I/O pin Unregulated power supply Ground Regulated output voltage P VDD pins must be connected to this supply voltage A 1µF low ESR capacitor to GND must be connected to this pin I/O = digital input/output signal N = not to be connected P = power or ground 7 Pin Function Descriptions Datasheet AX5131 ...
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... Pin Function Descriptions 3.2. Pinout Drawing CLK16P CLK16N ANTP ANTN SYSCLK Version 1 VDD GND AX5131 GND 13 VDD Figure 2: Pinout drawing (Top view) NC VREG GND VDD_IO IRQ GND MOSI MISO CLK SEL Datasheet AX5131 ...
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... Input voltage digital pins V Electrostatic handling es T Operating temperature amb T Storage temperature stg T Junction Temperature j Version 1.0 CONDITION MIN -0.5 -10 -100 -0.5 -0.5 HBM -2000 -10 -65 9 Specifications MAX UNIT 5.5 V 100 mA 800 100 5.5 V 5.5 V 2000 V 60 °C 150 °C 150 °C Datasheet AX5131 ...
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... MHz, 11 dBm 868 MHz, 8 dBm 868 MHz, 2 dBm 868 MHz, -2 dBm 433 MHz, 13 dBm 433 MHz, 11 dBm 433 MHz, 8 dBm 433 MHz, 2 dBm 433 MHz, -2 dBm TYP. MAX. UNIT 27 60 °C 3.0 3.6 V 1.7 V 2.5 2.8 V 0.25 µ Datasheet AX5131 ...
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... Input voltage, low IL V Input voltage, high IH I Input leakage current L DIGITAL OUTPUTS I Output Current, high OH I Output Current, low OL I Tri-state output leakage current OZ Version 1.0 CONDITION MIN. TYP. 1.9 1.2 2 -10 11 Specifications MAX. UNIT µ µA Datasheet AX5131 ...
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... XTALOSCGM =0101 6 XTALOSCGM =0110 6.5 XTALOSCGM =0111 7 XTALOSCGM =1000 7.5 XTALOSCGM =1001 8 XTALOSCGM =1010 8.5 XTALOSCGM =1011 9 XTALOSCGM =1100 9.5 XTALOSCGM =1101 10 XTALOSCGM =1110 10.5 XTALOSCGM =1111 11 XTALCAP = 000000 2 default XTALCAP = 111111 33 0.5 10 MAX. UNIT MHz 0.5 V kΩ Datasheet AX5131 ...
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... MHz, 300 kHz from carrier 433 MHz, 2 MHz from carrier 13 Specifications TYP. MAX. UNIT 16 MHz 940 MHz 470 1 Hz 100 50 kHz 200 500 15 30 µ µ -85 -90 -100 -110 dBc/Hz -90 -95 -105 -115 -80 -90 -105 -115 dBc/Hz -90 -95 -110 -122 Datasheet AX5131 ...
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... TXRNG=0000 TXRNG=0001 -5 TXRNG=0010 0.4 TXRNG=0011 4 TXRNG=0100 6.2 TXRNG=0101 8 TXRNG=0110 9.3 TXRNG=0111 10.3 TXRNG=1000 11.2 TXRNG=1001 11.9 TXRNG=1010 12.5 TXRNG=1011 13 TXRNG=1100 13.5 TXRNG=1101 13.8 TXRNG=1110 14 TXRNG=1111 14.5 TXRNG=1111 15.5 -50 Note 1 -55 MAX. UNIT 2000 kbps 200 -45 dBm dBm dBc Datasheet AX5131 ...
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... Tch CLK high duration Notes 1. For SPI access during power-down mode the period should be relaxed to 100ns. For a figure showing the SPI timing parameters see section 5.11: Serial Peripheral Interface (SPI). Version 1.0 CONDITION MIN. TYP Note Specifications MAX. UNIT Datasheet AX5131 ...
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... AX5131 receives data via the SPI port in frames. This standard operation mode is called Frame Mode. Pre and post ambles as well as checksums can be generated automatically. Interrupts control the data flow between a controller and the AX5131. The AX5131 behaves as a SPI slave interface. Configuration of the the SPI interface ...
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... The transconductance is programmed via register bits XTALOSCGM[3:0] in register XTALOSC. The integrated programmable tuning capacitor bank makes it possible to connect the oscillator directly to pins CLK16N and CLK16P without the need for external capacitors programmed using bits XTALCAP[5:0] in register XTALCAP. Version 1.0 Circuit Description PWRMODE register. PWRMODE register. At power- not Datasheet AX5131 17 ...
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... Adaptation of the bandwidth to the data-rate. For transmission of FSK and MSK it is required that the synthesizer bandwidth must be in the order of the data-rate. Version 1.0 register set the divider ratio. The SYSCLK output can be disabled. Datasheet AX5131 ...
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... FREQB FREQSEL=1. PLLRANGING Initiate VCO auto-ranging and check results Version 1.0 setting rather than FREQ, the bit FREQSEL in register PLLLOOP Purpose carrier frequency, switch to this carrier frequency by setting bit nd 19 Circuit Description FREQ or PLLLOOP settings, for details see the Datasheet AX5131 ...
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... It does so without adding additional bits, i.e. without changing the data rate. Spectral Shaping uses a self synchronizing feedback shift register. The encoder is programmed using the register ENCODING, details and recommendations on usage are given in the AX5131 Version 1.0 Programming Manual. Datasheet AX5131 ...
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... Basic FIFO status (EMPTY, FULL, Overrun, Underrun, and the top two bits of the top FIFO word) are also provided during each SPI access on MISO while the micro-controller shifts out the register address on MOSI. See the SPI interface section for details. This feature significantly reduces the number of SPI accesses necessary. Version 1.0 21 Circuit Description Datasheet AX5131 ...
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... HDLC Mode Note: HDLC mode follows High-Level Data Link Control (HDLC, ISO 13239) protocol. HDLC Mode is the main framing mode of the AX5131. In this mode, the automatic packet delimiting, and optional packet correctness check by inserting and checking a cyclic redundancy check (CRC) field. ...
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... Main Lobe Bandwidth BITRATE ∆ (1+h) ⋅BITRATE deviation ∆Φ = 180 BW = BITRATE 0 AX5131 supports OQPSK. However, unless Symbol = 10 Symbol = 11 ∆ ∆f = +3⋅f deviation deviation deviation 23 Circuit Description Max. Bitrate 2000 kBit/s 200 kBit/s 2000 kBit/s Max. Bitrate 400 kBit/s Datasheet AX5131 ...
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... Synthesizer and transmitter are running. Do not switch into this mode before the synthesizer has completely settled on the transmit frequency (in SYNTHTX mode), otherwise spurious spectral transmissions will occur. Typical Idd 0.25 µA 140 µA 500 µ Datasheet AX5131 ...
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... FIFO OVER FIFO UNDER SPI Timing Tss Tck TchTcl SCK MOSI R MISO Tssd Figure 5 Serial peripheral interface timing Version 1.0 AX5131 are programmed via the serial S3 S2 FIFO FULL FIFO EMPTY Tco 25 Circuit Description S1 S0 FIFOSTAT(1) FIFOSTAT(0) Tsh Tssz Datasheet AX5131 ...
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... No checks are made whether the programmed combination of bits makes sense! Bit 0 is always the LSB. Note Whole registers or register bits marked as reserved should be kept at their default values. Note All addresses not documented here must not be accessed, neither in reading nor in writing. Version 1.0 Datasheet AX5131 ...
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... Scratch Register PWRMODE(3:0) Power Mode XTALOSCGM(3: Crystal Oscillator FIFO EMPTY FIFOCMD(1:0) FIFO Control FIFO Data IRQ Mask IRQ Request SYSCLK(3:0) Pin Configuration 1 - IRQI - Pin Configuration 2 - IRQR - Pin Configuration 3 IRQ Inversion Modulation ENC SCRAM ENC DIFF ENC INV Encoder/Decoder Settings Datasheet AX5131 27 ...
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... Synthesizer Frequency nd 2 Synthesizer Frequency nd 2 Synthesizer Frequency nd Synthesizer Frequency Synthesizer Frequency Synthesizer Frequency Synthesizer Frequency FSK Frequency Deviation FSK Frequency Deviation FSK Frequency Deviation FLT(1:0) Synthesizer Loop Filter Settings VCOR(3:0) Synthesizer VCO Auto-Ranging TXRNG(3:0) Transmit Power Transmitter Bitrate Datasheet AX5131 ...
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... XTALCAP(5:0) – – – – – Register Bank Description Transmitter Bitrate Transmitter Bitrate PTTLCK – reserved Misc RF Flags GATE FIFO Fill state FIFO Threshold – STOPONERR(1:0) Additional FIFO control Crystal oscillator tuning capacitance – FOURFSKENA 4-FSK Control Datasheet AX5131 29 ...
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... Decoupling capacitors are not all drawn recommended to add 100 nF decoupling capacitor for every VDD and VDD_IO pin. In order to reduce noise on the antenna inputs it is recommended to add the VDD pins close to the antenna interface. Version 1.0 1µF VDD VDD_IO AX5131 ANTP ANTN VDD Figure 6 Typical application diagram IRQ MOSI Datasheet AX5131 ...
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... VREG from the voltage applied at VDD_IO. Use VREG to supply all the VDD supply pins. Version 1.0 AX5131 ANTP and ANTN pins with L3=L4 C2 C3=C5 L5=L6 [nH] [pF] [pF] [nH] 12 2.2 1 3.3 3 Application Information C6 LB 50Ω single- CB ended equipment or antenna LB CA=CB C4=C6 [nH] [pF] [pF] 6.2 8.2 150 12 18 150 Datasheet AX5131 ...
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... QFN20 Package Information 8. QFN20 Package Information 8.1. Package Outline TSSOP20 Version 1.0 Datasheet AX5131 ...
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... Version 1.0 QFN20 Package Information Datasheet AX5131 33 ...
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... QFN20 Package Information Version 1.0 Datasheet AX5131 ...
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... AXSEM customers using or selling this product for use in such applications their own risk and agree to fully indemnify AXSEM for any damages resulting from such improper use or sale. Version 1.0 35 Life Support Applications Datasheet AX5131 ...
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... Offenders will be held liable for the payment of damages. All rights reserved. Copyright © 2007 AXSEM AG Version 1.0 Phone +41 44 882 17 07 Fax +41 44 882 17 09 Email sales@axsem.com www.axsem.com Datasheet AX5131 ...