XC95108-15PC84I Xilinx Inc, XC95108-15PC84I Datasheet - Page 2

CPLD XC9500 Family 2.4K Gates 108 Macro Cells 55.6MHz 0.5um (CMOS) Technology 5V 84-Pin PLCC

XC95108-15PC84I

Manufacturer Part Number
XC95108-15PC84I
Description
CPLD XC9500 Family 2.4K Gates 108 Macro Cells 55.6MHz 0.5um (CMOS) Technology 5V 84-Pin PLCC
Manufacturer
Xilinx Inc
Series
XC9500r
Datasheets

Specifications of XC95108-15PC84I

Package
84PLCC
Family Name
XC9500
Device System Gates
2400
Number Of Macro Cells
108
Maximum Propagation Delay Time
15 ns
Number Of User I/os
69
Number Of Logic Blocks/elements
8
Typical Operating Supply Voltage
5 V
Maximum Operating Frequency
55.6 MHz
Number Of Product Terms Per Macro
90
Memory Type
Flash
Operating Temperature
-40 to 85 °C
Programmable Type
In System Programmable (min 10K program/erase cycles)
Delay Time Tpd(1) Max
15.0ns
Voltage Supply - Internal
4.5 V ~ 5.5 V
Number Of Logic Elements/blocks
6
Number Of Macrocells
108
Number Of Gates
2400
Number Of I /o
69
Mounting Type
Surface Mount
Package / Case
84-PLCC
Voltage
5V
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Number Of Logic Elements/cells
-
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
122-1246
XC95108-15PC84I

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XC95108 In-System Programmable CPLD
2
JTAG Port
I/O/GCK
I/O/GSR
I/O/GTS
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Function block outputs (indicated by the bold line) drive the I/O blocks directly.
2
3
1
1
3
Controller
Figure 2: XC95108 Architecture
Blocks
JTAG
I/O
www.xilinx.com
In-System Programming Controller
18
18
18
18
18
18
36
36
36
36
36
36
DS066 (v4.4) April 3, 2006
Macrocells
Macrocells
Macrocells
Macrocells
Macrocells
Macrocells
Function
Function
Function
Function
Function
Function
Product Specification
Block 1
Block 2
Block 3
Block 4
Block 5
Block 6
1 to 18
1 to 18
1 to 18
1 to 18
1 to 18
1 to 18
DS066_02_110101
R

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