MCP1602-ADJI/MF Microchip Technology, MCP1602-ADJI/MF Datasheet - Page 12

• Manufacturer Part Number: MCP1602-ADJI/MF
• Description: IC,SMPS CONTROLLER,VOLTAGE-MODE,LLCC,8PIN,PLASTIC
• Manufacturer: Microchip Technology
• Type: Step-Down (Buck)r

Specifications of MCP1602-ADJI/MF

• Internal Switch(s): Yes
• Synchronous Rectifier: Yes
• Number Of Outputs: 1
• Voltage - Output: 0.8 ~ 4.5 V
• Current - Output: 500mA
• Frequency - Switching: 2MHz
• Voltage - Input: 2.7 ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-DFN
• Output Voltage: 0.8 V to 4.5 V
• Output Current: 500 mA
• Input Voltage: 2.7 V to 5.5 V
• Switching Frequency: 2 MHz
• Operating Temperature Range: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• Duty Cycle (max): 90 %
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power - Output: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

MCP1602
4.0
4.1
The MCP1602 is a synchronous buck regulator with a
power-good signal. The device operates in a Pulse
Frequency Modulation (PFM) mode or a Pulse Width
Modulation
efficiency over the entire operating current range.
Capable of operating from a 2.7V to 5.5V input voltage
source, the MCP1602 can deliver 500 mA of
continuous output current.
When using the MCP1602, the PCB area required for
a complete step-down converter is minimized since
both the main P-Channel MOSFET and the synchro-
nous N-Channel MOSFET are integrated. Also while in
PWM mode, the device switches at a constant
frequency of 2.0 MHz (typical) which allow for small fil-
tering components. Both fixed and adjustable output
voltage options are available. The fixed voltage options
(1.2V, 1.5V, 1.8V, 2.5V, 3.3V) do not require an external
voltage divider which further reduces the required
circuit board footprint. The adjustable output voltage
options allow for more flexibility in the design, but
require an external voltage divider.
Additionally the device features undervoltage lockout
(UVLO),
protection, and enable/disable control.
4.2
The MCP1602 has two distinct modes of operation that
allow the device to maintain a high level of efficiency
throughout the entire operating current and voltage
range. The device automatically switches between
PWM mode and PFM mode depending upon the output
load requirements.
4.2.1
During heavy load conditions, the MCP1602 operates
at a high, fixed switching frequency of 2.0 MHz (typi-
cal). This minimizes output ripple (10 - 15 mV typically)
and noise while maintaining high efficiency (88% typi-
cal with V
During normal PWM operation, the beginning of a
switching cycle occurs when the internal P-Channel
MOSFET is turned on. The ramping inductor current is
sensed and tied to one input of the internal high-speed
comparator. The other input to the high-speed compar-
ator is the error amplifier output. This is the difference
between the internal 0.8V reference and the sensed
output voltage. When the sensed current becomes
equal to the amplified error signal, the high-speed
comparator switches states and the P-Channel
MOSFET is turned off. The N-Channel MOSFET is
turned on until the internal oscillator sets an internal RS
latch initiating the beginning of another switching cycle.
DS22061A-page 12
DETAILED DESCRIPTION
Device Overview
Synchronous Buck Regulator
IN
overtemperature
FIXED FREQUENCY, PWM MODE
= 3.6V, V
(PWM)
OUT
mode
= 1.8V, I
shutdown,
to
OUT
maximize
= 300 mA).
overcurrent
system
PFM-to-PWM mode transition is initiated for any of the
following conditions:
• Continuous device switching
• Output voltage has dropped out of regulation
4.2.2
During light load conditions, the MCP1602 operates in
a PFM mode. When the MCP1602 enters this mode, it
begins to skip pulses to minimize unnecessary
quiescent current draw by reducing the number of
switching cycles per second. The typical quiescent
current draw for this device is 45 µA.
PWM-to-PFM mode transition is initiated for any of the
following conditions:
• Discontinuous inductor current is sensed for a set
• Inductor peak current falls below the transition
4.3
The open-drain power-good (PG) circuitry monitors the
regulated output voltage. A fixed delay time of
approximately 262 ms is generated once the output
voltage is above the power-good high threshold,
V
falls below the power-good low threshold, V
(typically 92% of V
low state indicating that the output is out of regulation.
The PG circuitry has a typical 165 µs delay when
detecting a falling output voltage. This helps to
increase the noise immunity of the power-good output,
avoiding false triggering of the PG signal during line
and load transients.
FIGURE 4-1:
TH_H
duration
threshold limit
V
V
TH_H
OUT
PG
, (typically 94% of V
Power-Good (PG)
LIGHT LOAD, PFM MODE
OUT
t
RPU
Power-Good Timing.
) the PG signal transitions to a
© 2007 Microchip Technology Inc.
OUT
). As the output voltage
V
OH
V
TH_L
V
OL
t
RPD
TH_L
,