MCP98242T-CE/MC Microchip Technology, MCP98242T-CE/MC Datasheet - Page 12

• Manufacturer Part Number: MCP98242T-CE/MC
• Description: JEDEC DIMM Serial Output Temp Sensor + SPD EEPROM 8 DFN 2X3mm T/R
• Manufacturer: Microchip Technology

Specifications of MCP98242T-CE/MC

• Function: Temp Monitoring System (Sensor)
• Topology: ADC (Sigma Delta), Register Bank
• Sensor Type: Internal
• Sensing Temperature: -40°C ~ 125°C
• Output Type: I²C™/SMBus™
• Output Alarm: Yes
• Output Fan: Yes
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 8-DFN
• Full Temp Accuracy: +/- 2 C
• Digital Output - Bus Interface: Serial (2-Wire, I2C)
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: MCP98242T-CE/MCTR

MCP98242
FIGURE 4-1:
4.1.5
After the Start condition, each bit of data in
transmission needs to be settled for a time specified by
t
“Sensor And EEPROM Serial Interface Timing
Specifications” on Page 5).
DS21996D-page 12
SU-DATA
SCLK
SDA
Start
before SCLK toggles from low-to-high (see
DATA VALID
0
1
Address
Code
2
0
3
1 1 A2 A1 A0
Device Addressing.
Address Byte
4
5
Address
Slave
6
MCP98242 Response
7
R/W
8
A
C
K
9
4.1.6
Each receiving device, when addressed, is obliged to
generate an ACK bit after the reception of each byte.
The master device must generate an extra clock pulse
for ACK to be recognized.
The acknowledging device pulls down the SDA line for
t
the master. SDA also needs to remain pulled down for
t
During read, the master must signal an End-of-Data
(EOD) to the slave by not generating an ACK bit (NAK)
once the last bit has been clocked out of the slave. In
this case, the slave will leave the data line released to
enable the master to generate the Stop condition.
4.1.7
If the SCLK stays low or high for time specified by t
the MCP98242 temperature sensor resets the serial
interface. This dictates the minimum clock speed as
specified in the SMBus specification. However, the
EEPROM does not reset the serial interface.
Therefore, the master can hold the clock indefinitely to
process data from the EEPROM.
SU-DATA
H-DATA
after a high-to-low transition of SCLK.
before the low-to-high transition of SCLK from
ACKNOWLEDGE (ACK)
TIME OUT (MCP98242)
 2010 Microchip Technology Inc.
OUT
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