NCP1392BDR2G ON Semiconductor, NCP1392BDR2G Datasheet - Page 5

• Manufacturer Part Number: NCP1392BDR2G
• Description: HV HALF-BRIDGE DRIVER
• Manufacturer: ON Semiconductor
• Type: High Side/Low Sider
• Series: -r

Specifications of NCP1392BDR2G

• Rise Time: 40 ns
• Fall Time: 20 ns
• Supply Voltage (min): 8 V
• Mounting Style: SMD/SMT
• Bridge Type: Half Bridge
• Number Of Drivers: 2
• Number Of Outputs: 2
• Input Type: Non-Inverting
• On-state Resistance: -
• Current - Output / Channel: -
• Current - Peak Output: 1A
• Voltage - Supply: 16V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (0.154", 3.90mm Width)
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

ELECTRICAL CHARACTERISTICS
V
SUPPLY SECTION
Turn−On Threshold Level, V
Minimum Operating Voltage after Turn−On
V
Startup Current, V
Startup Current, V
Internal IC Consumption, No Output Load on Pins 8/7 − 5/4, Fsw = 100 kHz
Internal IC Consumption, 1 nF Output Load on Pins 8/7 − 5/4, Fsw = 100 kHz
Consumption in Fault Mode (Drivers Disabled, V
V
INTERNAL OSCILLATOR
Minimum Switching Frequency,
R
Maximum Switching Frequency, R
Reference Voltage for all Current Generations
Operating Duty Cycle Symmetry
NOTE:
DRIVE OUTPUT
Output Voltage Rise Time @ CL = 1 nF, 10−90% of Output Signal
Output Voltage Fall Time @ CL = 1 nF, 10−90% of Output Signal
Source Resistance
Sink Resistance
Deadtime
PROTECTION
Brown−Out Input Bias Current
Brown−Out Level
Hysteresis Current, V
Temperature Shutdown
Hysteresis
Startup Voltage on the Floating Section
Cutoff Voltage on the Floating Section,
Consumption During PFC Delay Period, 0°C v T
Consumption During PFC Delay Period, −40°C v T
Internal IC Consumption, No Output Load on Pin 8/7 F
Internal IC Consumption, 1 nF Load on Pin 8/7 F
Consumption in Fault Mode (Drivers Disabled, V
Internal Resistance Discharging C
Leakage Current on High Voltage Pins to GND (600 Vdc)
Reference Voltage for EN Input
Enable Comparator Hysteresis
Propagation Delay Before Drivers are Stopped
Delay Before Any Driver Restart
CC
CC
CC
t
= 35 kW on Pin 2, D
= 12 V, unless otherwise noted)
Level at which the Internal Logic gets Reset
Zener Clamp Voltage @ 20 mA
Maximum capacitance directly connected to Pin 2 must be under 100 pF.
CC
CC
< VCC
< VCC
pin3
T
= 600 ns
< VBO
CC
ON
ON
, 0°C v T
, −40°C v T
Going Up
Characteristic
t
soft−start
= 3.5 kW on Pin 2, D
amb
(For typical values T
amb
v +125°C
< 0°C
CC
boot
SW
amb
> V
amb
= 100 kHz
> Vboot
v +125°C
SW
CC(min)
T
< 0°C
= 600 ns
http://onsemi.com
= 100 kHz
min
, R
J
)
= 25°C, for min/max values T
T
= 3.5 kW)
5
6,7,8
5, 7
5, 7
5, 7
5, 7
5, 7
Pin
5,7
1
1
1
1
1
1
1
1
1
1
8
8
8
1
2
2
2
2
3
3
3
3
3
3
−
−
−
J
PFC Delay
Rt
EN_Hyste
EN_Delay
VCC
TSDhyste
F
Vboot
Vboot
VCC
F
= −40°C to +125°C, Max T
Symbol
VCC
IHV
VCC
IBO
V
V
SW
SW
discharge
T
I
I
I
VBO
I
I
I
I
I
ref
R
ref
TSD
boot1
boot2
boot3
R
IBO
I
I
CC
CC
CC
CC
CC
DC
dead
CC
CC
T
T
OH
OL
Leak
clamp
reset
max
r
bias
f
EN
min
RT
ON
min
1
2
3
4
4
ON
min
24.25
15.4
3.33
0.95
15.6
Min
208
540
140
7.8
1.9
10
48
8
7
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
2.56
1.44
0.01
18.2
Typ
245
500
610
100
100
8.8
6.5
2.2
3.4
0.3
0.1
3.5
0.5
16
25
50
40
20
12
30
11
9
8
−
−
−
−
5
−
1
2
−
J
25.75
= 150°C,
Max
17.5
3.67
1.05
20.7
400
470
282
720
9.8
2.1
12
10
50
65
52
9
−
−
−
−
−
−
−
−
−
−
−
−
5
−
−
−
−
−
−
Unit
kHz
kHz
mA
mA
mA
mA
mA
mA
mV
ms
mA
mA
mA
mA
mA
mA
mA
ns
ns
ns
ms
°C
°C
%
W
W
W
V
V
V
V
V
V
V
V
V