PIC12HV609-E/MS Microchip Technology, PIC12HV609-E/MS Datasheet

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... All references to the PIC16F616 parts refer to the PIC16HV616 as well (unless otherwise specified). 3: All references to the PIC12F609 parts refer to the PIC12HV609 as well (unless otherwise specified). 4: All references to the PIC16F610 parts refer to the PIC16HV610 as well (unless otherwise specified). 5: Any references in this programming specification to PORTA and RAn refer to GPIO and GPn, respectively ...

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... ICSPCLK GP0/RA0 ICSPDAT MCLR Program/Verify mode Legend Input Output Power Note 1: In the PIC12F609/12F615/12F617/16F610/16F616 and PIC12HV609/12HV615/16HV610/16HV616, the programming high voltage is internally generated. To activate the Program/Verify mode, voltage of V and a current of I (see Table 7-1) needs to be applied to MCLR input. IHH DS41396A-page 2 ( ...

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... PIC12F609/12F615/12F617/16F610/16F616 AND PIC12HV609/12HV615/16HV610/16HV616 3.0 MEMORY DESCRIPTION 3.1 Program Memory Map The user memory space extends from 0x0000 to 0x1FFF. In Program/Verify mode, the program memory space extends from 0x0000 to 0x3FFF, with the first half (0x0000-0x1FFF) being user program memory and the second half (0x2000-0x3FFF) being configuration memory ...

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... PIC12F609/12F615/12F617/16F610/16F616 AND PIC12HV609/12HV615/16HV610/16HV616 FIGURE 3-1: PIC12F615/HV615, PIC12F609/HV609, PIC16F610/HV610 PROGRAM MEMORY MAPPING User ID Location 2000 User ID Location 2001 User ID Location 2002 User ID Location 2003 Reserved 2004 Reserved 2005 Device ID 2006 Configuration Word 2007 2008 Calibration Word Reserved 2009-203F DS41396A-page Implemented 03FF Program Memory ...

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... PIC12F609/12F615/12F617/16F610/16F616 AND PIC12HV609/12HV615/16HV610/16HV616 FIGURE 3-2: PIC12F617/PIC16F616/HV616 PROGRAM MEMORY MAPPING User ID Location 2000 User ID Location 2001 User ID Location 2002 User ID Location 2003 Reserved 2004 Reserved 2005 Device ID 2006 Configuration Word 2007 2008 Calibration Word 2009-203F Reserved (1) 2009-206F Note 1: Applies to the PIC12F617 only. ...

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... PIC12F609/12F615/12F617/16F610/16F616 AND PIC12HV609/12HV615/16HV610/16HV616 4.0 PROGRAM/VERIFY MODE Two methods are available to enter Program/Verify mode. “V -first” is entered by holding ICSPDAT and PP ICSPCLK low while raising the MCLR pin from V V (high voltage), then applying V IHH DD method can be used for any Configuration Word selec- tion and must be used if the INTOSC and internal MCLR options are selected (FOSC< ...

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... PIC12F609/12F615/12F617/16F610/16F616 AND PIC12HV609/12HV615/16HV610/16HV616 4.1.1 ONE-WORD PROGRAMMING The PIC12F615, PIC12F609, PIC16F616 PIC16F610 program memories can be written one word at a time to allow compatibility with other 8-pin ® and 14-pin Flash PIC devices. Configuration memory (>0x2000) must be written one word (or byte time. The sequences for programming one word of program memory at a time is: 1 ...

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... PIC12F609/12F615/12F617/16F610/16F616 AND PIC12HV609/12HV615/16HV610/16HV616 4.1.3 ERASE ALGORITHMS The PIC12F609/12F615/12F617/16F610/16F616 and PIC12HV609/12HV615/16HV610/16HV616 devices will erase different memory locations depending on the PC and CP. The following sequences can be used to erase noted memory locations. To erase the program memory and Configuration Word (0x2007), the following sequence must be performed. Note the Calibration Word (0x2008) and User ID (0x2000-0x2003) will not be erased ...

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... PIC12F609/12F615/12F617/16F610/16F616 AND PIC12HV609/12HV615/16HV610/16HV616 TABLE 4-1: COMMAND MAPPING FOR PIC12F609/12F615/12F617/16F610/16F616 AND PIC12HV609/12HV615/16HV610/16HV616 Command Load Configuration Load Data for Program Memory Read Data from Program Memory Increment Address Begin Programming End Programming Bulk Erase Program Memory Row Erase Program Memory 4.1.4.1 Load Configuration ...

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... PIC12F609/12F615/12F617/16F610/16F616 AND PIC12HV609/12HV615/16HV610/16HV616 4.1.4.2 Load Data For Program Memory After receiving this command, the chip will load in a 14-bit “data word” when 16 cycles are applied, as described in Section 4.1.4.1 “Load Configuration”. A timing diagram of this command is shown in Figure 4-5. FIGURE 4-5: ...

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... PIC12F609/12F615/12F617/16F610/16F616 AND PIC12HV609/12HV615/16HV610/16HV616 4.1.4.4 Increment Address The PC is incremented when this command is received. A timing diagram of this command is shown in Figure 4- not possible to decrement the address counter. To reset this counter, the user should exit and re-enter Program/Verify mode. FIGURE 4-7: INCREMENT ADDRESS COMMAND (PROGRAM/VERIFY) ...

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... PIC12F609/12F615/12F617/16F610/16F616 AND PIC12HV609/12HV615/16HV610/16HV616 4.1.4.6 End Programming After this command is performed, the write procedure will stop. A timing diagram of this command is shown in Figure 4-9. FIGURE 4-9: END PROGRAMMING (SERIAL PROGRAM/VERIFY) V IHH MCLR 1 ICSPCLK 0 ICSPDAT 4.1.4.7 Bulk Erase Program Memory After this command is performed, the entire program memory and Configuration Word (0x2007) is erased ...

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... PIC12F609/12F615/12F617/16F610/16F616 AND PIC12HV609/12HV615/16HV610/16HV616 4.1.4.8 Row Erase Program Memory This command erases the 16-word row of program memory pointed to by PC<11:4>. If the program mem- ory array is protected ( the PC points to the configuration memory (>0x2000), the command is ignored. To perform a Row Erase Program Memory, the following sequence must be performed. ...

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... PIC12F609/12F615/12F617/16F610/16F616 AND PIC12HV609/12HV615/16HV610/16HV616 FIGURE 4-12: ONE-WORD PROGRAMMING FLOWCHART (PIC12F61X/16F61X AND PIC12F609) Start Bulk Erase Program (1,2) Memory One-word Program Cycle Read Data from Program Memory Data Correct? Yes Increment No All Locations Address Done? Command Yes Program User ID/Config. bits Done Note 1: This step is optional if the device has already been erased or has not been previously programmed. ...

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... PIC12F609/12F615/12F617/16F610/16F616 AND PIC12HV609/12HV615/16HV610/16HV616 FIGURE 4-13: FOUR-WORD PROGRAMMING FLOWCHART (PIC12F617/PIC16F616) Start Bulk Erase Program (1,2) Memory Four-word Program Cycle Increment No All Locations Address Done? Command Program User ID/Config. bits Done Note 1: This step is optional if the device is erased or not previously programmed the device is code-protected or must be completely erased, then bulk erase the device per Figure 4-15. ...

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... PIC12F609/12F615/12F617/16F610/16F616 AND PIC12HV609/12HV615/16HV610/16HV616 FIGURE 4-14: PROGRAM FLOWCHART – CONFIGURATION MEMORY Start Load Configuration One-word Program Cycle (User ID) Read Data From Program Memory Command No Data Correct? Yes Increment Address Command No Yes Address = 0x2004? DS41396A-page 16 PROGRAM CYCLE Load Data Program Memory Programming Command ...

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... PIC12F609/12F615/12F617/16F610/16F616 AND PIC12HV609/12HV615/16HV610/16HV616 FIGURE 4-15: PROGRAM FLOWCHART – ERASE FLASH DEVICE Note 1: See Section 4.1.4.7 “Bulk Erase Program Memory” for more information on the bulk erase procedure.  2009 Microchip Technology Inc. Start Load Configuration (1) Bulk Erase Program Memory Done DS41396A-page 17 ...

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... PIC12F609/12F615/12F617/16F610/16F616 AND PIC12HV609/12HV615/16HV610/16HV616 5.0 CONFIGURATION WORD The PIC12F609/12F615/12F617/16F610/16F616 and PIC12HV609/12HV615/16HV610/16HV616 have several Configuration bits. These bits can be programmed (reads ‘0’) or left unchanged (reads ‘1’), to select various device configurations. REGISTER 5-1: CONFIG: CONFIGURATION WORD (ADDRESS: 2007h) U-1 U-1 — — ...

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... PIC12F609/12F615/12F617/16F610/16F616 AND PIC12HV609/12HV615/16HV610/16HV616 REGISTER 5-2: CONFIG: CONFIGURATION WORD (ADDRESS: 2007h) FOR PIC12F617 ONLY U-1 U-1 — — bit 13 R/P-1 R/P-1 CP MCLRE bit 6 Legend Bit is unknown R = Readable bit W = Writable bit -n = Value at POR ‘1’ = Bit is set bit 13-12 Unimplemented: Read as ‘1’ ...

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... PIC12F609/12F615/12F617/16F610/16F616 AND PIC12HV609/12HV615/16HV610/16HV616 5.1 Device ID Word The device ID word for the PIC12F609/12F615/ 12F617/16F610/16F616 and PIC12HV609/12HV615/ 16HV610/16HV616 is loaded at 2006h. This location can not be erased. TABLE 5-1: DEVICE ID VALUES Device ID Values Device Dev PIC12F615 10 0001 100 PIC12HV615 10 0001 101 PIC12F617 01 0011 011 PIC16F616 ...

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... PIC16F616). Any carry bits exceeding 16 bits are neglected. Finally, the Configuration Word (appropriately masked) is added to the checksum. The checksum computation for the PIC12F609/12F615/ 12F617/16F610/16F616 and PIC12HV609/12HV615/ 16HV610/16HV616 devices is shown in Table 6-1. The checksum is calculated by summing the following: • The contents of all program memory locations • ...

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... PIC12F609/12F615/12F617/16F610/16F616 AND PIC12HV609/12HV615/16HV610/16HV616 TABLE 6-1: CHECKSUM COMPUTATIONS Code Device Protect PIC12F615/HV615 PIC12F617 PIC12F609/HV609 PIC16F610/HV610 PIC16F616/HV616 Legend: CFGW = Configuration Word. Example calculations assume Configuration Word is erased (all ‘1’s). SUM[a:b] = [Sum of locations inclusive] SUM_ID = User ID locations masked by 0xF then made into a 16-bit value with ID0 as the Most Significant nibble. For example, ID0 = 0x1, ID1 = 0x2, ID3 = 0x3, ID4 = 0x4, then SUM_ID = 0x1234. The 4 LSb’ ...

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... PIC12F609/12F615/12F617/16F610/16F616 AND PIC12HV609/12HV615/16HV610/16HV616 7.0 PROGRAM/VERIFY MODE ELECTRICAL CHARACTERISTICS TABLE 7-1: AC/DC CHARACTERISTICS TIMING REQUIREMENTS FOR PROGRAM/VERIFY MODE AC/DC CHARACTERISTICS Sym. Characteristics General V V level for read/write operations program and data memory V level for bulk erase operations, DD program and data memory V High voltage on MCLR for ...

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... PIC12F609/12F615/12F617/16F610/16F616 AND PIC12HV609/12HV615/16HV610/16HV616 APPENDIX A: REVISION HISTORY Revision A (10/2009) Original release of this document. DS41396A-page 24  2009 Microchip Technology Inc. ...

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... REAL ICE, rfLAB, Select Mode, Total Endurance, TSHARC, UniWinDriver, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...

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