PIC16F1938-I/MV Microchip Technology, PIC16F1938-I/MV Datasheet - Page 3

28KB Flash, 1KB RAM, 256B EEPROM, LCD, 1.8-5.5V 28 UQFN 4x4x0.5mm TUBE

PIC16F1938-I/MV

Manufacturer Part Number
PIC16F1938-I/MV
Description
28KB Flash, 1KB RAM, 256B EEPROM, LCD, 1.8-5.5V 28 UQFN 4x4x0.5mm TUBE
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr

Specifications of PIC16F1938-I/MV

Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
28KB (16K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-UFQFN Exposed Pad
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
MI2C, SPI, EUSART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
25
Number Of Timers
5
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
DV164035, DV244005
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 11 Channel
On-chip Dac
5 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Silicon Errata Issues
1. Module: ADC
1.1 Analog-to-Digital Converter (ADC)
FIGURE 1:
 2010 Microchip Technology Inc.
Note:
F
T
T
See the ADC Clock Period (T
section of the DS41364D data sheet.
Under certain device operating conditions, the
ADC conversion may not complete properly. When
this occurs, the ADC Interrupt Flag (ADIF) does
not get set, the GO/DONE bit does not get cleared
and the conversion result does not get loaded into
the ADRESH and ADRESL result registers.
In Figure 1, 88 instruction cycles (T
required to complete the full conversion. Each T
cycle consists of 8 T
provided to stop the A/D conversion after 86
instruction cycles and terminate the conversion at
the correct time as shown in the figure above.
CY
AD
OSC
= 4/32 MHz = 125 nsec
= 1 µsec, ADCS = F
= 32 MHz
This document summarizes all silicon
errata issues from all revisions of silicon,
previous as well as current. Only the
issues indicated by the shaded column in
the following tables apply to the current
silicon revision (A1).
4 T
8 T
1 T
CY
CY
AD
INSTRUCTION CYCLE DELAY CALCULATION EXAMPLE
CY
OSC
periods. A fixed delay is
/32
AD
) vs. Device Operating Frequencies table, in the Analog-to-Digital Converter
88 T
11 T
84 T
CY
CY
AD
CY
) will be
AD
PIC16F/LF1938/1939
Work around
Method 1: Select
Method 2: Provide a fixed delay in software
oscillator as the ADC conversion
clock source, and perform all
conversions with the device in
Sleep.
to stop the A-to-D conversion
manually, after all 10 bits are
converted,
conversion
automatically. The conversion is
stopped by clearing the GO/
DONE bit in software. The GO/
DONE bit must be cleared during
the last ½ T
conversion
completed automatically. Refer to
Figure 1 for details.
Stop the A/D conversion
between 10.5 and 11 T
cycles.
See the Analog-to-Digital
Conversion Timing diagram
in
Converter section of the
DS41364D data sheet.
the
the
AD
Analog-to-Digital
but
would
cycle, before the
DS80501A-page 3
dedicated
would
before
complete
AD
have
RC
the

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