PIC16F724T-I/MV Microchip Technology, PIC16F724T-I/MV Datasheet - Page 33

• Manufacturer Part Number: PIC16F724T-I/MV
• Description: 7KB Flash Program, 1.8V-5.5V, 16MHz Internal Oscillator, 8b ADC, CCP, I2C/SPI, A
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16F724T-I/MV

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Size: 7KB (4K x 14)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 192 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 14x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-UFQFN Exposed Pad
• Core: PIC
• Processor Series: PIC16F
• Data Ram Size: 192 B
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 5.5 V
• Mounting Style: SMD/SMT
• Interface Type: I2C, SPI, AUSART
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

3.0
The PIC16F72X/PIC16LF72X differentiates between
various kinds of Reset:
a)
b)
c)
d)
e)
f)
Some registers are not affected in any Reset condition;
their status is unknown on POR and unchanged in any
other Reset. Most other registers are reset to a “Reset
state” on:
• Power-on Reset (POR)
• MCLR Reset
• MCLR Reset during Sleep
• WDT Reset
• Brown-out Reset (BOR)
FIGURE 3-1:
© 2009 Microchip Technology Inc.
Power-on Reset (POR)
WDT Reset during normal operation
WDT Reset during Sleep
MCLR Reset during normal operation
MCLR Reset during Sleep
Brown-out Reset (BOR)
RESETS
MCLR/V
OSC1/
CLKIN
Note 1:
V
DD
PP
SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT
WDTOSC
OST/PWRT
Refer to the Configuration Word Register 1 (Register 8-1).
Brown-out
Module
WDT
Reset
POR
MCLRE
OST
PWRT
(1)
10-bit Ripple Counter
WDT
Time-out
Reset
11-bit Ripple Counter
BOREN
Power-on Reset
Sleep
PIC16F72X/PIC16LF72X
Most registers are not affected by a WDT wake-up
since this is viewed as the resumption of normal
operation. TO and PD bits are set or cleared differently
in different Reset situations, as indicated in Table 3-3.
These bits are used in software to determine the nature
of the Reset.
A simplified block diagram of the On-Chip Reset Circuit
is shown in Figure 3-1.
The MCLR Reset path has a noise filter to detect and
ignore small pulses. See Section 23.0 “Electrical
Specifications” for pulse width specifications.
Enable PWRT
Enable OST
DS41341E-page 33
Chip_Reset