PIC16LF726-E/ML Microchip Technology, PIC16LF726-E/ML Datasheet - Page 101

14 KB Flash, 16 MHz Int. Osc, NanoWatt XLP 28 QFN 6x6mm TUBE

PIC16LF726-E/ML

Manufacturer Part Number
PIC16LF726-E/ML
Description
14 KB Flash, 16 MHz Int. Osc, NanoWatt XLP 28 QFN 6x6mm TUBE
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheet

Specifications of PIC16LF726-E/ML

Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
14KB (8K x 14)
Program Memory Type
FLASH
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 11x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
TABLE 9-1:
FIGURE 9-2:
© 2009 Microchip Technology Inc.
Legend: Shaded cells are outside of recommended range.
Note 1:
Clock Source
Fosc/16
Fosc/32
Fosc/64
ADC Clock Period (T
Fosc/2
Fosc/4
Fosc/8
ADC
F
2:
3:
4:
RC
Tcy to T
The F
These values violate the minimum required T
For faster conversion times, the selection of another clock source is recommended.
When the device frequency is greater than 1 MHz, the F
conversion will be performed during Sleep.
Set GO/DONE bit
Holding Capacitor is Disconnected from Analog Input (typically 100 ns)
AD
RC
T
ADC CLOCK PERIOD (T
AD
source has a typical T
ADCS<2:0>
0
ANALOG-TO-DIGITAL CONVERSION T
Conversion Starts
000
100
001
101
010
110
x11
T
AD
AD
)
1
T
AD
b7
1.0-6.0 μs
2
100 ns
200 ns
400 ns
20 MHz
800 ns
1.6 μs
3.2 μs
AD
T
time of 1.6 μs for V
AD
b6
AD
(2)
(2)
(2)
(1,4)
3
) V
S
T
1.0-6.0 μs
. DEVICE OPERATING FREQUENCIES
AD
b5
PIC16F72X/PIC16LF72X
125 ns
250 ns
0.5 μs
AD
16 MHz
4
1.0 μs
2.0 μs
4.0 μs
time.
T
(2)
(2)
(2)
Device Frequency (F
AD
ADRES register is loaded,
GO/DONE bit is cleared,
ADIF bit is set,
Holding capacitor is connected to analog input
b4
(1,4)
DD
5
.
RC
AD
1.0-6.0 μs
clock source is only recommended if the
T
CYCLES
250 ns
500 ns
AD
b3
8.0 μs
8 MHz
1.0 μs
2.0 μs
4.0 μs
6
(3)
(2)
(2)
(1,4)
T
AD
b2
7
OSC
1.0-6.0 μs
16.0 μs
500 ns
T
8.0 μs
)
4 MHz
AD
1.0 μs
2.0 μs
4.0 μs
b1
8
(3)
(2)
(3)
(1,4)
T
AD
DS41341E-page 101
b0
9
1.0-6.0 μs
16.0 μs
32.0 μs
64.0 μs
8.0 μs
1 MHz
2.0 μs
4.0 μs
(3)
(3)
(3)
(3)
(1,4)

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