PIC18F1330-E/SO Microchip Technology, PIC18F1330-E/SO Datasheet
PIC18F1330-E/SO
Specifications of PIC18F1330-E/SO
Related parts for PIC18F1330-E/SO
PIC18F1330-E/SO Summary of contents
Page 1
... FIGURE 6-3: TABLE POINTER BOUNDARIES BASED ON OPERATION TBLPTRU © 2008 Microchip Technology Inc. PIC18F1230/1330 2. Module: Flash Program Memory In Section 6.2.4 “Table Pointer Boundaries”, the third paragraph and Figure 6-3 are modified: • The paragraph is modified by the removal of the first sentence and the addition of new text shown in bold ...
Page 2
... RXDTP has no effect on the Synchronous mode DT signal. The register table and new bit descriptions appear as shown. R/W-0 R/W-0 U-0 TXCKP BRG16 — Unimplemented bit, read as ‘0’ ‘0’ = Bit is cleared R/W-0 R/W-0 WUE ABDEN bit Bit is unknown © 2008 Microchip Technology Inc. ...
Page 3
... Service Routine is modified with the new text shown in bold. a) End the mismatch condition by doing either of the following: - Reading or writing to CMCON - Returning the input to its original state b) Clear flag bit CMPxIF © 2008 Microchip Technology Inc. PIC18F1230/1330 R/W-0 R/W-0 R/W-0 VCFG0 PCFG3 PCFG2 U = Unimplemented bit, read as ‘0’ ...
Page 4
... Table 17-1 and REF VOLTAGE REFERENCE OUTPUT C Comparator Input VREF Disabled No reference 0 Disabled From V 1 REF (CV bypassed) REF Enabled From CV 0 REF Enabled From CV 1 REF R/W-0 R/W-0 R/W-0 CVR2 CVR1 CVR0 bit Bit is unknown ) SS © 2008 Microchip Technology Inc. ...
Page 5
... FIGURE 17-1: COMPARATOR VOLTAGE REFERENCE BLOCK DIAGRAM CVRSS = REF AV DD CVRSS = 0 CVREN CVRR AV SS © 2008 Microchip Technology Inc. PIC18F1230/1330 8R CVR3:CVR0 Steps CVRSS = x CVREN = 0 CV REF CVREN = 1 DS80352B-page 5 ...
Page 6
... Instruction set extension and Indexed Addressing mode enabled 0 = Instruction set extension and Indexed Addressing mode disabled bit 5-4 BBSIZ<1:0>: Boot Block Size Select bits For PIC18F1330 device Boot Block size Boot Block size 01 = 512W Boot Block size 00 = 256W Boot Block size ...
Page 7
... Legend Read-only bit P = Programmable bit -n = Value when device is unprogrammed bit 7-5 DEV2:DEV0: Device ID bits 000 =PIC18F1230 001 =PIC18F1330 bit 4-0 REV4:REV0: Revision ID bits These bits are used to indicate the device revision. REGISTER 19-14: DEVID2: DEVICE ID REGISTER 2 FOR PIC18F1230/1330 DEVICES DEV10 ...
Page 8
... E/W -40°C to +85°C V Using EECON to read/write V = Minimum operating MIN voltage ms Year Provided no other specifications are violated E/W -40°C to +85°C mA E/W -40°C to +85° Minimum operating MIN voltage Minimum operating MIN voltage ms Year Provided no other specifications are violated mA © 2008 Microchip Technology Inc. ...
Page 9
... Initial release of this data sheet errata. Includes Data Sheet Clarifications 1 (Oscillator Configurations – PLL), 2 (Flash Program Memory), 3 (EUSART), 4 (A/D), 5 (Comparator), 6 (Comparator Voltage Reference), 7 (Special Features of the CPU) and 8 (Electrical Characteristics). Rev B Document (9/2008) Changes to Data Sheet Clarification 7 (Special Features of the CPU). © 2008 Microchip Technology Inc. PIC18F1230/1330 DS80352B-page 9 ...
Page 10
... PIC18F1230/1330 NOTES: DS80352B-page 10 © 2008 Microchip Technology Inc. ...
Page 11
... PowerMate, PowerTool, REAL ICE, rfLAB, Select Mode, Total Endurance, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...
Page 12
... Fax: 886-3-572-6459 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 © 2008 Microchip Technology Inc. EUROPE Austria - Wels Tel: 43-7242-2244-39 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 France - Paris Tel: 33-1-69-53-63-20 ...