PIC18F44K20-E/MV Microchip Technology, PIC18F44K20-E/MV Datasheet - Page 203

• Manufacturer Part Number: PIC18F44K20-E/MV
• Description: 16KB, Flash, 768bytes-RAM, 36I/O, 8-bit Family,nanowatt XLP 40 UQFN 5x5x0.5mm TU
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F44K20-E/MV

• Processor Series: PIC18
• Core: PIC18F
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 8 KB
• Data Ram Size: 512 B
• Interface Type: I2C, SPI, SCI, USB, MSSP, RJ11
• Maximum Clock Frequency: 64 MHz
• Number Of Programmable I/os: 35
• Number Of Timers: 4
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: UQFN-40
• Development Tools By Supplier: MPLAB Integrated Development Environment
• Minimum Operating Temperature: - 40 C
• Operating Temperature Range: - 40 C to + 125 C
• Supply Current (max): 30 uA
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 35
• Eeprom Size: 256 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 14x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Lead Free Status / Rohs Status: Details

REGISTER 17-3:
 2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
Master mode
bit 7-0
10-Bit Slave mode: Most significant address byte
bit 7-3
bit 2-1
bit 0
10-Bit Slave mode: Least significant address byte
bit 7-0
7-Bit Slave mode
bit 7-1
bit 0
R/W-0
ADD7
ADD<7:0>: Baud Rate Clock Divider bits
SCL pin clock period = ((ADD<7:0> + 1) *4)/F
Not used: Unused for most significant address byte. Bit state of this register is a don’t care. Bit pattern
sent by master is fixed by I
compared by hardware and are not affected by the value in this register.
ADD<9:8>: Two most significant bits of 10-bit address
Not used: Unused in this mode. Bit state is a “don’t care”.
ADD<7:0>: Eight least significant bits of 10-bit address
ADD<7:1>: 7-bit address
Not used: Unused in this mode. Bit state is a “don’t care”.
R/W-0
ADD6
SSPADD: MSSP ADDRESS AND BAUD RATE REGISTER (I
W = Writable bit
‘1’ = Bit is set
R/W-0
ADD5
2
C specification and must be equal to ‘11110’. However, those bits are
R/W-0
ADD4
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
OSC
R/W-0
ADD3
PIC18F2XK20/4XK20
R/W-0
ADD2
x = Bit is unknown
2
R/W-0
ADD1
C MODE)
DS41303G-page 203
R/W-0
ADD0
bit 0