PIC18F45K20-E/ML Microchip Technology, PIC18F45K20-E/ML Datasheet

32KB, Flash, 1536bytes-RAM, 36I/O, 8-bit Family,nanowatt XLP 44 QFN 8x8x0.9mm TU

PIC18F45K20-E/ML

Manufacturer Part Number
PIC18F45K20-E/ML
Description
32KB, Flash, 1536bytes-RAM, 36I/O, 8-bit Family,nanowatt XLP 44 QFN 8x8x0.9mm TU
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr

Specifications of PIC18F45K20-E/ML

Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
44-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM240313 - BOARD DEMO 8BIT XLPAC164112 - VOLTAGE LIMITER MPLAB ICD2 VPPDM164124 - KIT STARTER FOR PIC18F4XK20AC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
The PIC18F24/25/44/45K20 family devices that you
have received conform functionally to the current Device
Data Sheet (DS41303F), except for the anomalies
described in this document.
The silicon issues discussed in the following pages are
for silicon revisions with the Device and Revision IDs
listed in Table 1. The silicon issues are summarized in
Table 2.
The errata described in this document will be addressed
in future revisions of the PIC18F24/25/44/45K20 silicon.
Data Sheet clarifications and corrections start on page 8,
following the discussion of silicon issues.
The silicon revision level can be identified using the
current version of MPLAB
programmers, debuggers, and emulation tools, which
are available at the Microchip corporate web site
(www.microchip.com).
TABLE 1:
© 2009 Microchip Technology Inc.
PIC18F24K20
PIC18F25K20
PIC18F44K20
PIC18F45K20
Note 1:
PIC18F24/25/44/45K20 Device IDs Rev. 0xA Through 0x11
Note:
2:
3:
Part Number
The Device IDs (DEVID and DEVREV) are located at the last two implemented addresses of configuration
memory space. They are shown in hexadecimal in the format “DEVID:DEVREV”.
Refer to the “PIC18F2XK20/4XK20 Flash Memory Programming Specification” (DS41297) for detailed
information on Device and Revision IDs for your specific device.
If your device contains a revision ID code that is greater than 0x11, please refer to DS80425 for silicon
errata and data sheet clarifications.
This document summarizes all silicon
errata issues from all specified revisions of
silicon.
SILICON DEVREV VALUES
Silicon Errata and Data Sheet Clarification
®
IDE and Microchip’s
Device ID
105h
103h
104h
102h
(1)
(11-bit)
0xA
0xA
0xA
0xA
A4
For example, to identify the silicon revision level using
MPLAB IDE in conjunction with MPLAB ICD 2 or
PICkit™ 3:
1.
2.
3.
4.
The DEVREV values for the various PIC18F24/25/44/
45K20 silicon revisions are shown in Table 1.
PIC18F24/25/44/45K20
Revision ID for Silicon Revision
Note:
Using the appropriate interface, connect the
device to the MPLAB ICD 2 programmer/
debugger or PICkit™ 3.
From the main menu in MPLAB IDE, select
Configure>Select Device, and then select the
target part number in the dialog box.
Select
(Debugger>Select Tool).
Perform a “Connect” operation to the device
(Debugger>Connect).
development tool used, the part number and
Device Revision ID value appear in the Output
window.
If you are unable to extract the silicon
revision level, please contact your local
Microchip sales office for assistance.
0xC
0xC
0xC
0xC
A7
the
MPLAB
0xE
0xE
0xE
0xE
Depending
A9
hardware
(2)
DS80366G-page 1
(5-bit)
on
0x11
0x11
0x11
0x11
AB
tool
the

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PIC18F45K20-E/ML Summary of contents

Page 1

... Part Number Device ID PIC18F24K20 PIC18F25K20 PIC18F44K20 PIC18F45K20 Note 1: The Device IDs (DEVID and DEVREV) are located at the last two implemented addresses of configuration memory space. They are shown in hexadecimal in the format “DEVID:DEVREV”. 2: Refer to the “PIC18F2XK20/4XK20 Flash Memory Programming Specification” (DS41297) for detailed information on Device and Revision IDs for your specific device ...

Page 2

... Endurance is limited to 10K cycles. 24. Endurance is limited to 1K cycles. 25. HFOFST bit erases to ‘0’ instead of ‘1’. 26. RCIDL bit may stay low improperly. 27. False interrupt when setting interrupt enable. 28. ADC conversion may be limited to half scale. (1) Affected Revisions © 2009 Microchip Technology Inc. ...

Page 3

... SSPBUF. Enable TMR2 after SSPBUF is written. Affected Silicon Revisions © 2009 Microchip Technology Inc. PIC18F24/25/44/45K20 2 4. Module: MSSP I C™ 2 Slew rate is slower than I C specifications when the SLRCON<2> bit is set. Work around Clear SLRCON<2> bit when using the I peripheral. ...

Page 4

... Enable the FVR by setting the FVREN bit of the CVRCON2 peripheral that automatically enables the FVR. Peripherals that automatically enable the FVR include the Brown-out Reset, the High/Low Voltage Detect, and the HFINTOSC. Affected Silicon Revisions (FVR) register before activating any A9 AB © 2009 Microchip Technology Inc. ...

Page 5

... Affected Silicon Revisions © 2009 Microchip Technology Inc. PIC18F24/25/44/45K20 18. Module: POR/BOR The POR rearm voltage may be below the low end of the BOR range causing unexpected code execution below the BOR range. Work around Use external power monitor to hold device in Reset below 1.1 Volts. ...

Page 6

... RCIF flag going high. If this time is greater than one character time, then restore the RCIDL bit by resetting the EUSART module. The EUSART module is reset when the SPEN bit of the RCSTA register is cleared. Affected Silicon Revisions above 3V. Endurance DD is below 3V ® IDE programming tools © 2009 Microchip Technology Inc. ...

Page 7

... Moderate 001, 010, 100, 101, or Probability Probability 110 © 2009 Microchip Technology Inc. PIC18F24/25/44/45K20 Work around 1. Restrict the input voltage to less than 1/2 of the ADC voltage reference so that the expected result is always a code less than or equal to 511. 2. Use manual acquisition time (ACQT<2:0> = 000) and use the ADC’ ...

Page 8

... The following typographic corrections and clarifications are to be noted for the latest version of the device data sheet (DS41303F): Note: Corrections are shown in bold. Where possible, the original bold text formatting has been removed for clarity. None. DS80366G-page 8 © 2009 Microchip Technology Inc. ...

Page 9

... MSSP Block Diagram; Added Module 6 MSSP: Sec- tions 17.4.7.1, 17.4.8, 17.4.9, 17.4.17.1, 17.4.17.2, 17.4.17.3: SSPADD, changing <6:0> to <7:0>. Rev G Document (10/2009) Updated the title of the errata. Data Sheet Clarifications: Updated the errata deleting Modules © 2009 Microchip Technology Inc. PIC18F24/25/44/45K20 2 C, updating DS80366G-page 9 ...

Page 10

... PIC18F24/25/44/45K20 NOTES: DS80366G-page 10 © 2009 Microchip Technology Inc. ...

Page 11

... REAL ICE, rfLAB, Select Mode, Total Endurance, TSHARC, UniWinDriver, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...

Page 12

... Fax: 886-3-6578-370 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 © 2009 Microchip Technology Inc. EUROPE Austria - Wels Tel: 43-7242-2244-39 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 France - Paris Tel: 33-1-69-53-63-20 ...

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