PIC18F46K22-I/MV Microchip Technology, PIC18F46K22-I/MV Datasheet - Page 130

64KB, Flash, 3968bytes-RAM,8-bit Family,nanoWatt XLP 40 UQFN 5x5x0.5mm TUBE

PIC18F46K22-I/MV

Manufacturer Part Number
PIC18F46K22-I/MV
Description
64KB, Flash, 3968bytes-RAM,8-bit Family,nanoWatt XLP 40 UQFN 5x5x0.5mm TUBE
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet

Specifications of PIC18F46K22-I/MV

Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 30x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-UFQFN Exposed Pad
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
4 KB
Number Of Programmable I/os
36
Number Of Timers
3 x 8-bit. 4 x 16-bit
Operating Supply Voltage
1.8 V to 5.5 V
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIC18(L)F2X/4XK22
REGISTER 9-17:
REGISTER 9-18:
DS41412D-page 130
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-3
bit 2
bit 1
bit 0
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-3
bit 2
bit 1
bit 0
U-0
U-0
Unimplemented: Read as ‘0’
CCP5IP: CCP5 Interrupt Priority bit
1 = High priority
0 = Low priority
CCP4IP: CCP4 Interrupt Priority bit
1 = High priority
0 = Low priority
CCP3IP: CCP3 Interrupt Priority bit
1 = High priority
0 = Low priority
Unimplemented: Read as ‘0’
TMR6IP: TMR6 to PR6 Match Interrupt Priority bit
1 = High priority
0 = Low priority
TMR5IP: TMR5 Overflow Interrupt Priority bit
1 = High priority
0 = Low priority
TMR4IP: TMR4 to PR4 Match Interrupt Priority bit
1 = High priority
0 = Low priority
U-0
U-0
IPR4: PERIPHERAL INTERRUPT PRIORITY REGISTER 4
IPR5: PERIPHERAL INTERRUPT PRIORITY REGISTER 5
W = Writable bit
W = Writable bit
‘1’ = Bit is set
‘1’ = Bit is set
U-0
U-0
U-0
U-0
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
U-0
CCP5IP
TMR6IP
R/W-0
R/W-0
 2010 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
CCP4IP
TMR5IP
R/W-0
R/W-0
CCP3IP
TMR4IP
R/W-0
R/W-0
bit 0
bit 0

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