PIC18LF27J53T-I/SS Microchip Technology, PIC18LF27J53T-I/SS Datasheet - Page 431

• Manufacturer Part Number: PIC18LF27J53T-I/SS
• Description: 28-pin, USB, 128KB Flash, 4KB RAM, 12 MIPS, 12-bit ADC 28 SSOP .209in T/R
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18LF27J53T-I/SS

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, LIN, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 2.75 V
• Data Converters: A/D 10x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

27.3.2
There is a small amount of capacitance from the inter-
nal A/D Converter sample capacitor as well as stray
capacitance from the circuit board traces and pads that
affect the precision of capacitance measurements. A
measurement of the stray capacitance can be taken by
making sure the desired capacitance to be measured
has been removed. The measurement is then
performed using the following steps:
1.
2.
3.
4.
5.
6.
where I is known from the current source measurement
step, t is a fixed delay and V is measured by performing
an A/D conversion.
 2010 Microchip Technology Inc.
Initialize the A/D Converter and the CTMU.
Set EDG1STAT (= 1).
Wait for a fixed delay of time, t.
Clear EDG1STAT.
Perform an A/D conversion.
Calculate the stray and A/D sample capacitances:
C
OFFSET
CAPACITANCE CALIBRATION
=
C
STRAY
+
C
AD
=

I t 
 V 
Preliminary
PIC18F47J53 FAMILY
This measured value is then stored and used for
calculations of time measurement or subtracted for
capacitance measurement. For calibration, it is
expected that the capacitance of C
approximately known. C
An iterative process may need to be used to adjust the
time, t, that the circuit is charged to obtain a reasonable
voltage reading from the A/D Converter. The value of t
may be determined by setting C
value, then solving for t. For example, if C
theoretically calculated to be 11 pF, and V is expected
to be 70% of V
or 63 s.
See Example 27-3 for a typical routine for CTMU
capacitance calibration.
(4 pF + 11 pF) • 2.31V/0.55 A
DD
or 2.31V, then t would be:
AD
is approximately 4 pF.
OFFSET
DS39964B-page 431
STRAY
to a theoretical
+ C
STRAY
AD
is
is