PIC18LF45K22T-I/MV Microchip Technology, PIC18LF45K22T-I/MV Datasheet - Page 413

• Manufacturer Part Number: PIC18LF45K22T-I/MV
• Description: 32KB, Flash, 1536bytes-RAM,8-bit Family,nanoWatt XLP 40 UQFN 5x5x0.5mm T/R
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18LF45K22T-I/MV

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 64MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 30x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-UFQFN Exposed Pad
• Processor Series: PIC18LF
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1536 B
• Number Of Programmable I/os: 36
• Number Of Timers: 3 x 8-bit. 4 x 16-bit
• Operating Supply Voltage: 1.8 V to 5.5 V
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

SUBFSR
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
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Q Cycle Activity:
Before Instruction
After Instruction
Decode
FSR2
FSR2
Q1
=
=
register ‘f’
Subtract Literal from FSR
SUBFSR f, k
0  k  63
f  [ 0, 1, 2 ]
FSR(f) – k  FSRf
None
The 6-bit literal ‘k’ is subtracted from
the contents of the FSR specified by
‘f’.
1
1
SUBFSR 2, 23h
Read
1110
Q2
03FFh
03DCh
1001
Process
Data
Q3
ffkk
destination
Write to
kkkk
Q4
Preliminary
SUBULNK
Syntax:
Operands:
Operation:
Status Affected: None
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
PIC18(L)F2X/4XK22
Before Instruction
After Instruction
Operation
Decode
FSR2
PC
FSR2
PC
Q1
No
Subtract Literal from FSR2 and Return
SUBULNK k
0  k  63
FSR2 – k  FSR2
(TOS) PC
The 6-bit literal ‘k’ is subtracted from the
contents of the FSR2. A RETURN is then
executed by loading the PC with the TOS.
The instruction takes two cycles to
execute; a NOP is performed during the
second cycle.
This may be thought of as a special case of
the SUBFSR instruction, where f = 3 (binary
‘11’); it operates only on FSR2.
1
2
1110
=
=
=
=
register ‘f’
Operation
SUBULNK 23h
Read
Q2
No
03FFh
0100h
03DCh
(TOS)
1001
Operation
Process
Data
Q3
No
DS41412D-page 413
11kk
destination
Operation
Write to
kkkk
Q4
No