PIC24F16KA302-E/SS Microchip Technology, PIC24F16KA302-E/SS Datasheet - Page 62

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PIC24F16KA302-E/SS

Manufacturer Part Number
PIC24F16KA302-E/SS
Description
16KB Flash, 2KB RAM, 512B EEPROM, 16 MIPS, 12-bit ADC, CTMU, XLP 28 SSOP .209in
Manufacturer
Microchip Technology
Series
PIC® XLP™ 24Fr
Datasheet

Specifications of PIC24F16KA302-E/SS

Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
16KB (5.5K x 24)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 13x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-SSOP (0.209", 5.30mm Width)
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
PIC24FV32KA304 FAMILY
5.5.1
The user can program one row of Flash program
memory at a time by erasing the programmable row.
The general process is as follows:
1.
2.
3.
EXAMPLE 5-1:
DS39995B-page 62
; Set up NVMCON for row erase operation
; Init pointer to row to be ERASED
Read a row of program memory (32 instructions)
and store in data RAM.
Update the program data in RAM with the
desired new data.
Erase a row (see
a)
b)
c)
d)
e)
Set the NVMOP bits (NVMCON<5:0>) to
‘011000’ to configure for row erase. Set the
ERASE
(NVMCON<14>) bits.
Write the starting address of the block to be
erased into the TBLPAG and W registers.
Write 55h to NVMKEY.
Write AAh to NVMKEY.
Set the WR bit (NVMCON<15>). The erase
cycle begins and the CPU stalls for the
duration of the erase cycle. When the erase is
done, the WR bit is cleared automatically.
MOV
MOV
MOV
MOV
MOV
TBLWTL W0, [W0]
DISI
MOV
MOV
MOV
MOV
BSET
NOP
NOP
PROGRAMMING ALGORITHM FOR
FLASH PROGRAM MEMORY
#0x4058, W0
W0, NVMCON
#tblpage(PROG_ADDR), W0
W0, TBLPAG
#tbloffset(PROG_ADDR), W0
#5
#0x55, W0
W0, NVMKEY
#0xAA, W1
W1, NVMKEY
NVMCON, #WR
(NVMCON<6>)
Example
ERASING A PROGRAM MEMORY ROW – ASSEMBLY LANGUAGE CODE
5-1):
and
WREN
;
; Initialize NVMCON
;
; Initialize PM Page Boundary SFR
; Initialize in-page EA[15:0] pointer
; Set base address of erase block
; Block all interrupts
; Write the 55 key
;
; Write the AA key
; Start the erase sequence
; Insert two NOPs after the erase
; command is asserted
for next 5 instructions
4.
5.
For protection against accidental operations, the write
initiate sequence for NVMKEY must be used to allow
any erase or program operation to proceed. After the
programming command has been executed, the user
must wait for the programming time until programming
is complete. The two instructions following the start of
the programming sequence should be NOPs, as shown
in
Example
Write the first 32 instructions from data RAM into
the program memory buffers (see
Write the program block to Flash memory:
a)
b)
c)
d)
Set the NVMOP bits to ‘011000’ to
configure for row programming. Clear the
ERASE bit and set the WREN bit.
Write 55h to NVMKEY.
Write AAh to NVMKEY.
Set the WR bit. The programming cycle
begins and the CPU stalls for the duration of
the write cycle. When the write to Flash
memory is done, the WR bit is cleared
automatically.
5-5.
 2011 Microchip Technology Inc.
Example
5-1).

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