PIC24FV16KA302-E/ML Microchip Technology, PIC24FV16KA302-E/ML Datasheet - Page 39

• Manufacturer Part Number: PIC24FV16KA302-E/ML
• Description: 16KB Flash, 2KB RAM, 512B EEPROM, 16 MIPS, 12-bit ADC, CTMU, 5V 28 QFN 6x6mm TUB
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 24Fr

Specifications of PIC24FV16KA302-E/ML

• Processor Series: PIC24FV
• Core: PIC
• Data Bus Width: 16 bit
• Program Memory Type: Flash
• Program Memory Size: 16 KB
• Data Ram Size: 2 KB
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: QFN-28
• Development Tools By Supplier: MPLAB IDE Software
• Minimum Operating Temperature: - 40 C
• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 23
• Eeprom Size: 512 x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 13x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Lead Free Status / Rohs Status: Details

PIC24FV32KA304 FAMILY
4.2
The PIC24F core has a separate, 16-bit wide data
memory space, addressable as a single linear range.
The data space is accessed using two Address
Generation Units (AGUs), one each for read and write
operations. The data space memory map is shown in
Figure
All Effective Addresses (EAs) in the data memory space
are 16 bits wide and point to bytes within the data space.
This gives a data space address range of 64 Kbytes or
32K words. The lower half of the data memory space
(that is, when EA<15> = 0) is used for implemented
memory addresses, while the upper half (EA<15> = 1) is
reserved for the Program Space Visibility (PSV) area
(see
Memory Using Program Space
FIGURE 4-3:
DS39995B-page 39
Section 4.3.3 “Reading Data From Program
Note:
4-3.
Data Address Space
Data memory areas are not shown to scale.
Implemented
Data RAM
DATA SPACE MEMORY MAP FOR PIC24FV32KA304 FAMILY DEVICES
Visibility”).
Address
FFFFh
07FFh
0FFFh
7FFFh
0001h
0801h
8001h
MSB
1FFF
MSB
Unimplemented
Program Space
Visibility Area
SFR Space
Read as ‘0’
Data RAM
LSB
PIC24FV32KA304 family devices implement a total of
1024 words of data memory. If an EA points to a
location outside of this area, an all zero word or byte will
be returned.
4.2.1
The
byte-addressable, 16-bit wide blocks. Data is aligned in
data memory and registers as 16-bit words, but all the
data space EAs resolve to bytes. The Least Significant
Bytes (LSBs) of each word have even addresses, while
the Most Significant Bytes (MSBs) have odd
addresses.
data
Address
0000h
07FEh
0800h
0FFEh
1FFEh
7FFFh
8000h
FFFEh
LSB
DATA SPACE WIDTH
memory
Space
SFR
 2011 Microchip Technology Inc.
space
Data Space
Near
is
organized
in